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https://github.com/embassy-rs/embassy.git
synced 2024-11-22 06:42:32 +00:00
Only access the necessary parts of State
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parent
7b4d2ab1be
commit
61e3ca049c
@ -55,12 +55,12 @@ pub unsafe fn on_interrupt(r: Otg, state: &State<{ MAX_EP_COUNT }>, ep_count: us
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while r.grstctl().read().txfflsh() {}
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}
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if state.ep0_setup_ready.load(Ordering::Relaxed) == false {
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if state.cp_state.setup_ready.load(Ordering::Relaxed) == false {
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// SAFETY: exclusive access ensured by atomic bool
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let data = unsafe { &mut *state.ep0_setup_data.get() };
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let data = unsafe { &mut *state.cp_state.setup_data.get() };
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data[0..4].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes());
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data[4..8].copy_from_slice(&r.fifo(0).read().0.to_ne_bytes());
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state.ep0_setup_ready.store(true, Ordering::Release);
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state.cp_state.setup_ready.store(true, Ordering::Release);
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state.ep_states[0].out_waker.wake();
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} else {
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error!("received SETUP before previous finished processing");
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@ -216,11 +216,15 @@ struct EpState {
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out_size: AtomicU16,
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}
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struct ControlPipeSetupState {
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/// Holds received SETUP packets. Available if [Ep0State::setup_ready] is true.
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setup_data: UnsafeCell<[u8; 8]>,
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setup_ready: AtomicBool,
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}
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/// USB OTG driver state.
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pub struct State<const EP_COUNT: usize> {
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/// Holds received SETUP packets. Available if [State::ep0_setup_ready] is true.
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ep0_setup_data: UnsafeCell<[u8; 8]>,
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ep0_setup_ready: AtomicBool,
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cp_state: ControlPipeSetupState,
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ep_states: [EpState; EP_COUNT],
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bus_waker: AtomicWaker,
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}
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@ -242,8 +246,10 @@ impl<const EP_COUNT: usize> State<EP_COUNT> {
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};
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Self {
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ep0_setup_data: UnsafeCell::new([0u8; 8]),
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ep0_setup_ready: AtomicBool::new(false),
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cp_state: ControlPipeSetupState {
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setup_data: UnsafeCell::new([0u8; 8]),
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setup_ready: AtomicBool::new(false),
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},
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ep_states: [NEW_EP_STATE; EP_COUNT],
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bus_waker: NEW_AW,
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}
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@ -385,11 +391,11 @@ impl<'d> Driver<'d> {
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trace!(" index={}", index);
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let state = &self.instance.state.ep_states[index];
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if D::dir() == Direction::Out {
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// Buffer capacity check was done above, now allocation cannot fail
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unsafe {
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*self.instance.state.ep_states[index].out_buffer.get() =
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self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _);
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*state.out_buffer.get() = self.ep_out_buffer.as_mut_ptr().offset(self.ep_out_buffer_offset as _);
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}
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self.ep_out_buffer_offset += max_packet_size as usize;
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}
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@ -397,7 +403,7 @@ impl<'d> Driver<'d> {
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Ok(Endpoint {
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_phantom: PhantomData,
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regs: self.instance.regs,
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state: self.instance.state,
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state,
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info: EndpointInfo {
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addr: EndpointAddress::from_parts(index, D::dir()),
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ep_type,
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@ -446,6 +452,7 @@ impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> {
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let regs = self.instance.regs;
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let quirk_setup_late_cnak = self.instance.quirk_setup_late_cnak;
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let cp_setup_state = &self.instance.state.cp_state;
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(
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Bus {
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config: self.config,
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@ -456,6 +463,7 @@ impl<'d> embassy_usb_driver::Driver<'d> for Driver<'d> {
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},
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ControlPipe {
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max_packet_size: control_max_packet_size,
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setup_state: cp_setup_state,
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ep_out,
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ep_in,
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regs,
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@ -955,7 +963,7 @@ pub struct Endpoint<'d, D> {
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_phantom: PhantomData<D>,
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regs: Otg,
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info: EndpointInfo,
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state: &'d State<{ MAX_EP_COUNT }>,
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state: &'d EpState,
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}
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impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> {
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@ -967,7 +975,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, In> {
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poll_fn(|cx| {
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let ep_index = self.info.addr.index();
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self.state.ep_states[ep_index].in_waker.register(cx.waker());
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self.state.in_waker.register(cx.waker());
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if self.regs.diepctl(ep_index).read().usbaep() {
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Poll::Ready(())
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@ -988,7 +996,7 @@ impl<'d> embassy_usb_driver::Endpoint for Endpoint<'d, Out> {
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poll_fn(|cx| {
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let ep_index = self.info.addr.index();
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self.state.ep_states[ep_index].out_waker.register(cx.waker());
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self.state.out_waker.register(cx.waker());
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if self.regs.doepctl(ep_index).read().usbaep() {
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Poll::Ready(())
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@ -1006,7 +1014,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> {
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poll_fn(|cx| {
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let index = self.info.addr.index();
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self.state.ep_states[index].out_waker.register(cx.waker());
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self.state.out_waker.register(cx.waker());
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let doepctl = self.regs.doepctl(index).read();
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trace!("read ep={:?}: doepctl {:08x}", self.info.addr, doepctl.0,);
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@ -1015,7 +1023,7 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> {
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return Poll::Ready(Err(EndpointError::Disabled));
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}
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let len = self.state.ep_states[index].out_size.load(Ordering::Relaxed);
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let len = self.state.out_size.load(Ordering::Relaxed);
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if len != EP_OUT_BUFFER_EMPTY {
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trace!("read ep={:?} done len={}", self.info.addr, len);
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@ -1024,14 +1032,11 @@ impl<'d> embassy_usb_driver::EndpointOut for Endpoint<'d, Out> {
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}
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// SAFETY: exclusive access ensured by `ep_out_size` atomic variable
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let data =
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unsafe { core::slice::from_raw_parts(*self.state.ep_states[index].out_buffer.get(), len as usize) };
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let data = unsafe { core::slice::from_raw_parts(*self.state.out_buffer.get(), len as usize) };
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buf[..len as usize].copy_from_slice(data);
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// Release buffer
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self.state.ep_states[index]
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.out_size
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.store(EP_OUT_BUFFER_EMPTY, Ordering::Release);
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self.state.out_size.store(EP_OUT_BUFFER_EMPTY, Ordering::Release);
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critical_section::with(|_| {
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// Receive 1 packet
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@ -1066,7 +1071,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> {
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let index = self.info.addr.index();
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// Wait for previous transfer to complete and check if endpoint is disabled
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poll_fn(|cx| {
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self.state.ep_states[index].in_waker.register(cx.waker());
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self.state.in_waker.register(cx.waker());
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let diepctl = self.regs.diepctl(index).read();
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let dtxfsts = self.regs.dtxfsts(index).read();
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@ -1091,7 +1096,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> {
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if buf.len() > 0 {
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poll_fn(|cx| {
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self.state.ep_states[index].in_waker.register(cx.waker());
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self.state.in_waker.register(cx.waker());
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let size_words = (buf.len() + 3) / 4;
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@ -1151,6 +1156,7 @@ impl<'d> embassy_usb_driver::EndpointIn for Endpoint<'d, In> {
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pub struct ControlPipe<'d> {
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max_packet_size: u16,
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regs: Otg,
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setup_state: &'d ControlPipeSetupState,
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ep_in: Endpoint<'d, In>,
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ep_out: Endpoint<'d, Out>,
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quirk_setup_late_cnak: bool,
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@ -1163,11 +1169,11 @@ impl<'d> embassy_usb_driver::ControlPipe for ControlPipe<'d> {
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async fn setup(&mut self) -> [u8; 8] {
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poll_fn(|cx| {
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self.ep_out.state.ep_states[0].out_waker.register(cx.waker());
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self.ep_out.state.out_waker.register(cx.waker());
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if self.ep_out.state.ep0_setup_ready.load(Ordering::Relaxed) {
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let data = unsafe { *self.ep_out.state.ep0_setup_data.get() };
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self.ep_out.state.ep0_setup_ready.store(false, Ordering::Release);
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if self.setup_state.setup_ready.load(Ordering::Relaxed) {
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let data = unsafe { *self.setup_state.setup_data.get() };
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self.setup_state.setup_ready.store(false, Ordering::Release);
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// EP0 should not be controlled by `Bus` so this RMW does not need a critical section
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// Receive 1 SETUP packet
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