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Cleanup BufferedUarte
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parent
3a4dbfa52e
commit
607e67f51a
@ -33,12 +33,25 @@ enum RxState {
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ReceivingReady,
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Stopping,
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}
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#[derive(Copy, Clone, Debug, PartialEq)]
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enum TxState {
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Idle,
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Transmitting(usize),
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}
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struct State<'a, T: Instance> {
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inner: T,
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rx: RingBuffer<'a>,
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rx_state: RxState,
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rx_waker: WakerRegistration,
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tx: RingBuffer<'a>,
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tx_state: TxState,
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tx_waker: WakerRegistration,
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}
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/// Interface to a UARTE instance
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///
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/// This is a very basic interface that comes with the following limitations:
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@ -145,6 +158,10 @@ impl<'a, T: Instance> BufferedUarte<'a, T> {
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),
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}
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}
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fn inner(self: Pin<&mut Self>) -> Pin<&mut PeripheralMutex<T::Interrupt, State<'a, T>>> {
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unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) }
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}
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}
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impl<'a, T: Instance> Drop for BufferedUarte<'a, T> {
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@ -156,111 +173,71 @@ impl<'a, T: Instance> Drop for BufferedUarte<'a, T> {
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impl<'a, T: Instance> AsyncBufRead for BufferedUarte<'a, T> {
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fn poll_fill_buf(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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let this = unsafe { self.get_unchecked_mut() };
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let reg = unsafe { Pin::new_unchecked(&mut this.inner) };
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reg.with(|_irq, state| {
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let z: Poll<Result<&[u8]>> = state.poll_fill_buf(cx);
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let z: Poll<Result<&[u8]>> = unsafe { mem::transmute(z) };
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z
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self.inner().with(|_irq, state| {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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trace!("poll_read");
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// We have data ready in buffer? Return it.
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let buf = state.rx.pop_buf();
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if buf.len() != 0 {
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trace!(" got {:?} {:?}", buf.as_ptr() as u32, buf.len());
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let buf: &[u8] = buf;
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let buf: &[u8] = unsafe { mem::transmute(buf) };
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return Poll::Ready(Ok(buf));
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}
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trace!(" empty");
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if state.rx_state == RxState::ReceivingReady {
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trace!(" stopping");
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state.rx_state = RxState::Stopping;
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state.inner.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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}
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state.rx_waker.register(cx.waker());
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Poll::<Result<&[u8]>>::Pending
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})
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}
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fn consume(self: Pin<&mut Self>, amt: usize) {
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let this = unsafe { self.get_unchecked_mut() };
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let reg = unsafe { Pin::new_unchecked(&mut this.inner) };
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reg.with(|irq, state| state.consume(irq, amt))
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self.inner().with(|irq, state| {
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trace!("consume {:?}", amt);
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state.rx.pop(amt);
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irq.pend();
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})
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}
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}
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impl<'a, T: Instance> AsyncWrite for BufferedUarte<'a, T> {
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fn poll_write(self: Pin<&mut Self>, cx: &mut Context<'_>, buf: &[u8]) -> Poll<Result<usize>> {
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let this = unsafe { self.get_unchecked_mut() };
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let reg = unsafe { Pin::new_unchecked(&mut this.inner) };
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reg.with(|irq, state| state.poll_write(irq, cx, buf))
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}
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}
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self.inner().with(|irq, state| {
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trace!("poll_write: {:?}", buf.len());
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// ====================================
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// ====================================
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// ====================================
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let tx_buf = state.tx.push_buf();
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if tx_buf.len() == 0 {
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trace!("poll_write: pending");
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state.tx_waker.register(cx.waker());
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return Poll::Pending;
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}
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// public because it needs to be used in Instance trait, but
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// should not be used outside the module
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#[doc(hidden)]
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pub struct State<'a, T: Instance> {
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inner: T,
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let n = min(tx_buf.len(), buf.len());
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tx_buf[..n].copy_from_slice(&buf[..n]);
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state.tx.push(n);
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rx: RingBuffer<'a>,
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rx_state: RxState,
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rx_waker: WakerRegistration,
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trace!("poll_write: queued {:?}", n);
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tx: RingBuffer<'a>,
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tx_state: TxState,
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tx_waker: WakerRegistration,
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}
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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impl<'a, T: Instance> State<'a, T> {
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fn poll_fill_buf(&mut self, cx: &mut Context<'_>) -> Poll<Result<&[u8]>> {
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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trace!("poll_read");
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irq.pend();
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// We have data ready in buffer? Return it.
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let buf = self.rx.pop_buf();
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if buf.len() != 0 {
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trace!(" got {:?} {:?}", buf.as_ptr() as u32, buf.len());
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return Poll::Ready(Ok(buf));
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}
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trace!(" empty");
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if self.rx_state == RxState::ReceivingReady {
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trace!(" stopping");
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self.rx_state = RxState::Stopping;
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self.inner.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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}
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self.rx_waker.register(cx.waker());
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Poll::Pending
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}
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fn consume(&mut self, irq: &mut T::Interrupt, amt: usize) {
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trace!("consume {:?}", amt);
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self.rx.pop(amt);
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irq.pend();
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}
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fn poll_write(
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&mut self,
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irq: &mut T::Interrupt,
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cx: &mut Context<'_>,
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buf: &[u8],
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) -> Poll<Result<usize>> {
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trace!("poll_write: {:?}", buf.len());
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let tx_buf = self.tx.push_buf();
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if tx_buf.len() == 0 {
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trace!("poll_write: pending");
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self.tx_waker.register(cx.waker());
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return Poll::Pending;
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}
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let n = min(tx_buf.len(), buf.len());
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tx_buf[..n].copy_from_slice(&buf[..n]);
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self.tx.push(n);
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trace!("poll_write: queued {:?}", n);
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// Conservative compiler fence to prevent optimizations that do not
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// take in to account actions by DMA. The fence has been placed here,
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// before any DMA action has started
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compiler_fence(Ordering::SeqCst);
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irq.pend();
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Poll::Ready(Ok(n))
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Poll::Ready(Ok(n))
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})
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}
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}
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