mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-21 22:32:29 +00:00
commit
4f0aca481f
@ -76,7 +76,7 @@ embedded-storage = { version = "0.3" }
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rand_core = "0.6.4"
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fixed = "1.23.1"
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rp-pac = { version = "5" }
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rp-pac = { version = "6" }
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embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
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embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
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@ -46,13 +46,13 @@ static CLOCKS: Clocks = Clocks {
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum PeriClkSrc {
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Sys = ClkPeriCtrlAuxsrc::CLK_SYS.0,
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PllSys = ClkPeriCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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PllUsb = ClkPeriCtrlAuxsrc::CLKSRC_PLL_USB.0,
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Rosc = ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkPeriCtrlAuxsrc::XOSC_CLKSRC.0,
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// Gpin0 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN0.0,
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// Gpin1 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN1.0,
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Sys = ClkPeriCtrlAuxsrc::CLK_SYS as _,
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PllSys = ClkPeriCtrlAuxsrc::CLKSRC_PLL_SYS as _,
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PllUsb = ClkPeriCtrlAuxsrc::CLKSRC_PLL_USB as _,
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Rosc = ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH as _,
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Xosc = ClkPeriCtrlAuxsrc::XOSC_CLKSRC as _,
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// Gpin0 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
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// Gpin1 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
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}
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#[non_exhaustive]
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@ -251,12 +251,12 @@ pub struct SysClkConfig {
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum UsbClkSrc {
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PllUsb = ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkUsbCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkUsbCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkUsbCtrlAuxsrc::XOSC_CLKSRC.0,
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// Gpin0 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN0.0,
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// Gpin1 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN1.0,
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PllUsb = ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB as _,
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PllSys = ClkUsbCtrlAuxsrc::CLKSRC_PLL_SYS as _,
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Rosc = ClkUsbCtrlAuxsrc::ROSC_CLKSRC_PH as _,
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Xosc = ClkUsbCtrlAuxsrc::XOSC_CLKSRC as _,
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// Gpin0 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
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// Gpin1 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
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}
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pub struct UsbClkConfig {
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@ -269,12 +269,12 @@ pub struct UsbClkConfig {
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum AdcClkSrc {
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PllUsb = ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkAdcCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkAdcCtrlAuxsrc::XOSC_CLKSRC.0,
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// Gpin0 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN0.0,
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// Gpin1 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN1.0,
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PllUsb = ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB as _,
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PllSys = ClkAdcCtrlAuxsrc::CLKSRC_PLL_SYS as _,
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Rosc = ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH as _,
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Xosc = ClkAdcCtrlAuxsrc::XOSC_CLKSRC as _,
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// Gpin0 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
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// Gpin1 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
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}
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pub struct AdcClkConfig {
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@ -287,12 +287,12 @@ pub struct AdcClkConfig {
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#[non_exhaustive]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RtcClkSrc {
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PllUsb = ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB.0,
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PllSys = ClkRtcCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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Rosc = ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH.0,
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Xosc = ClkRtcCtrlAuxsrc::XOSC_CLKSRC.0,
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// Gpin0 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN0.0,
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// Gpin1 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN1.0,
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PllUsb = ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB as _,
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PllSys = ClkRtcCtrlAuxsrc::CLKSRC_PLL_SYS as _,
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Rosc = ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH as _,
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Xosc = ClkRtcCtrlAuxsrc::XOSC_CLKSRC as _,
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// Gpin0 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
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// Gpin1 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
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}
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pub struct RtcClkConfig {
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@ -396,7 +396,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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w.set_src(ref_src);
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w.set_auxsrc(ref_aux);
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});
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while c.clk_ref_selected().read() != 1 << ref_src.0 {}
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while c.clk_ref_selected().read() != 1 << ref_src as u32 {}
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c.clk_ref_div().write(|w| {
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w.set_int(config.ref_clk.div);
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});
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@ -425,13 +425,13 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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CLOCKS.sys.store(clk_sys_freq, Ordering::Relaxed);
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if sys_src != ClkSysCtrlSrc::CLK_REF {
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c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
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while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF.0 {}
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while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF as u32 {}
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}
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c.clk_sys_ctrl().write(|w| {
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w.set_auxsrc(sys_aux);
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w.set_src(sys_src);
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});
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while c.clk_sys_selected().read() != 1 << sys_src.0 {}
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while c.clk_sys_selected().read() != 1 << sys_src as u32 {}
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c.clk_sys_div().write(|w| {
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w.set_int(config.sys_clk.div_int);
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w.set_frac(config.sys_clk.div_frac);
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@ -442,7 +442,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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if let Some(src) = config.peri_clk_src {
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c.clk_peri_ctrl().write(|w| {
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w.set_enable(true);
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w.set_auxsrc(ClkPeriCtrlAuxsrc(src as _));
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w.set_auxsrc(ClkPeriCtrlAuxsrc::from_bits(src as _));
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});
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let peri_freq = match src {
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PeriClkSrc::Sys => clk_sys_freq,
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@ -468,7 +468,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_usb_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(ClkUsbCtrlAuxsrc(conf.src as _));
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w.set_auxsrc(ClkUsbCtrlAuxsrc::from_bits(conf.src as _));
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});
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let usb_freq = match conf.src {
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UsbClkSrc::PllUsb => pll_usb_freq,
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@ -491,7 +491,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_adc_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(ClkAdcCtrlAuxsrc(conf.src as _));
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w.set_auxsrc(ClkAdcCtrlAuxsrc::from_bits(conf.src as _));
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});
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let adc_in_freq = match conf.src {
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AdcClkSrc::PllUsb => pll_usb_freq,
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@ -517,7 +517,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
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c.clk_rtc_ctrl().write(|w| {
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w.set_phase(conf.phase);
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w.set_enable(true);
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w.set_auxsrc(ClkRtcCtrlAuxsrc(conf.src as _));
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w.set_auxsrc(ClkRtcCtrlAuxsrc::from_bits(conf.src as _));
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});
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let rtc_in_freq = match conf.src {
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RtcClkSrc::PllUsb => pll_usb_freq,
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@ -718,7 +718,7 @@ impl<'d, T: Pin> Drop for Gpin<'d, T> {
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self.gpin
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _));
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}
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}
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@ -743,17 +743,17 @@ impl_gpoutpin!(PIN_25, 3);
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#[repr(u8)]
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pub enum GpoutSrc {
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PllSys = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS.0,
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// Gpin0 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN0.0,
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// Gpin1 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN1.0,
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PllUsb = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_USB.0,
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Rosc = ClkGpoutCtrlAuxsrc::ROSC_CLKSRC.0,
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Xosc = ClkGpoutCtrlAuxsrc::XOSC_CLKSRC.0,
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Sys = ClkGpoutCtrlAuxsrc::CLK_SYS.0,
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Usb = ClkGpoutCtrlAuxsrc::CLK_USB.0,
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Adc = ClkGpoutCtrlAuxsrc::CLK_ADC.0,
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Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC.0,
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Ref = ClkGpoutCtrlAuxsrc::CLK_REF.0,
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PllSys = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS as _,
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// Gpin0 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
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// Gpin1 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
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PllUsb = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_USB as _,
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Rosc = ClkGpoutCtrlAuxsrc::ROSC_CLKSRC as _,
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Xosc = ClkGpoutCtrlAuxsrc::XOSC_CLKSRC as _,
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Sys = ClkGpoutCtrlAuxsrc::CLK_SYS as _,
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Usb = ClkGpoutCtrlAuxsrc::CLK_USB as _,
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Adc = ClkGpoutCtrlAuxsrc::CLK_ADC as _,
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Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
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Ref = ClkGpoutCtrlAuxsrc::CLK_REF as _,
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}
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pub struct Gpout<'d, T: GpoutPin> {
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@ -780,7 +780,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
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pub fn set_src(&self, src: GpoutSrc) {
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let c = pac::CLOCKS;
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c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
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w.set_auxsrc(ClkGpoutCtrlAuxsrc(src as _));
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w.set_auxsrc(ClkGpoutCtrlAuxsrc::from_bits(src as _));
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});
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}
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@ -831,7 +831,7 @@ impl<'d, T: GpoutPin> Drop for Gpout<'d, T> {
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self.gpout
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.io()
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.ctrl()
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0));
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.write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _));
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}
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}
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@ -452,7 +452,7 @@ impl<'d, T: Pin> Flex<'d, T> {
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});
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pin.io().ctrl().write(|w| {
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w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0.0);
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w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0 as _);
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});
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Self { pin }
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@ -618,7 +618,7 @@ impl<'d, T: Pin> Drop for Flex<'d, T> {
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fn drop(&mut self) {
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self.pin.pad_ctrl().write(|_| {});
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self.pin.io().ctrl().write(|w| {
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w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0);
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w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _);
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});
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}
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}
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@ -834,7 +834,7 @@ impl<'d, PIO: Instance> Common<'d, PIO> {
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/// of [`Pio`] do not keep pin registrations alive.**
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pub fn make_pio_pin(&mut self, pin: impl Peripheral<P = impl PioPin + 'd> + 'd) -> Pin<'d, PIO> {
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into_ref!(pin);
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pin.io().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL.0));
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pin.io().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL as _));
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// we can be relaxed about this because we're &mut here and nothing is cached
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PIO::state().used_pins.fetch_or(1 << pin.pin_bank(), Ordering::Relaxed);
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Pin {
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@ -998,7 +998,7 @@ fn on_pio_drop<PIO: Instance>() {
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let state = PIO::state();
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if state.users.fetch_sub(1, Ordering::AcqRel) == 1 {
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let used_pins = state.used_pins.load(Ordering::Relaxed);
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let null = Gpio0ctrlFuncsel::NULL.0;
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let null = Gpio0ctrlFuncsel::NULL as _;
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// we only have 30 pins. don't test the other two since gpio() asserts.
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for i in 0..30 {
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if used_pins & (1 << i) != 0 {
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