mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-21 22:32:29 +00:00
Remove old embedded-hal trait implementations
This commit is contained in:
parent
02ee59fa1e
commit
4dbec3402e
@ -28,33 +28,30 @@ use crate::shared_bus::SpiDeviceError;
|
|||||||
use crate::SetConfig;
|
use crate::SetConfig;
|
||||||
|
|
||||||
/// SPI device on a shared bus.
|
/// SPI device on a shared bus.
|
||||||
pub struct SpiDevice<'a, M: RawMutex, BUS, CS, Word: Copy + 'static = u8> {
|
pub struct SpiDevice<'a, M: RawMutex, BUS, CS> {
|
||||||
bus: &'a Mutex<M, RefCell<BUS>>,
|
bus: &'a Mutex<M, RefCell<BUS>>,
|
||||||
cs: CS,
|
cs: CS,
|
||||||
_word: core::marker::PhantomData<Word>,
|
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS, CS, Word: Copy + 'static> SpiDevice<'a, M, BUS, CS, Word> {
|
impl<'a, M: RawMutex, BUS, CS> SpiDevice<'a, M, BUS, CS, > {
|
||||||
/// Create a new `SpiDevice`.
|
/// Create a new `SpiDevice`.
|
||||||
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
|
pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS) -> Self {
|
||||||
Self {
|
Self {
|
||||||
bus,
|
bus,
|
||||||
cs,
|
cs,
|
||||||
_word: core::marker::PhantomData,
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'a, M: RawMutex, BUS, CS, Word> spi::ErrorType for SpiDevice<'a, M, BUS, CS, Word>
|
impl<'a, M: RawMutex, BUS, CS> spi::ErrorType for SpiDevice<'a, M, BUS, CS, >
|
||||||
where
|
where
|
||||||
BUS: spi::ErrorType,
|
BUS: spi::ErrorType,
|
||||||
CS: OutputPin,
|
CS: OutputPin,
|
||||||
Word: Copy + 'static,
|
|
||||||
{
|
{
|
||||||
type Error = SpiDeviceError<BUS::Error, CS::Error>;
|
type Error = SpiDeviceError<BUS::Error, CS::Error>;
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<BUS, M, CS, Word> embedded_hal_1::spi::SpiDevice<Word> for SpiDevice<'_, M, BUS, CS, Word>
|
impl<BUS, M, CS, Word> embedded_hal_1::spi::SpiDevice<Word> for SpiDevice<'_, M, BUS, CS, >
|
||||||
where
|
where
|
||||||
M: RawMutex,
|
M: RawMutex,
|
||||||
BUS: SpiBus<Word>,
|
BUS: SpiBus<Word>,
|
||||||
@ -97,93 +94,6 @@ where
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer<u8>
|
|
||||||
for SpiDevice<'_, M, BUS, CS, Word>
|
|
||||||
where
|
|
||||||
M: RawMutex,
|
|
||||||
BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>,
|
|
||||||
CS: OutputPin<Error = CsErr>,
|
|
||||||
Word: Copy + 'static,
|
|
||||||
{
|
|
||||||
type Error = SpiDeviceError<BusErr, CsErr>;
|
|
||||||
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
|
|
||||||
self.bus.lock(|bus| {
|
|
||||||
let mut bus = bus.borrow_mut();
|
|
||||||
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
|
||||||
let op_res = bus.transfer(words);
|
|
||||||
let cs_res = self.cs.set_high();
|
|
||||||
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
|
|
||||||
cs_res.map_err(SpiDeviceError::Cs)?;
|
|
||||||
Ok(op_res)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write<u8> for SpiDevice<'_, M, BUS, CS, Word>
|
|
||||||
where
|
|
||||||
M: RawMutex,
|
|
||||||
BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>,
|
|
||||||
CS: OutputPin<Error = CsErr>,
|
|
||||||
Word: Copy + 'static,
|
|
||||||
{
|
|
||||||
type Error = SpiDeviceError<BusErr, CsErr>;
|
|
||||||
|
|
||||||
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
|
|
||||||
self.bus.lock(|bus| {
|
|
||||||
let mut bus = bus.borrow_mut();
|
|
||||||
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
|
||||||
let op_res = bus.write(words);
|
|
||||||
let cs_res = self.cs.set_high();
|
|
||||||
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
|
|
||||||
cs_res.map_err(SpiDeviceError::Cs)?;
|
|
||||||
Ok(op_res)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Transfer<u16>
|
|
||||||
for SpiDevice<'_, M, BUS, CS, Word>
|
|
||||||
where
|
|
||||||
M: RawMutex,
|
|
||||||
BUS: embedded_hal_02::blocking::spi::Transfer<u16, Error = BusErr>,
|
|
||||||
CS: OutputPin<Error = CsErr>,
|
|
||||||
Word: Copy + 'static,
|
|
||||||
{
|
|
||||||
type Error = SpiDeviceError<BusErr, CsErr>;
|
|
||||||
fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {
|
|
||||||
self.bus.lock(|bus| {
|
|
||||||
let mut bus = bus.borrow_mut();
|
|
||||||
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
|
||||||
let op_res = bus.transfer(words);
|
|
||||||
let cs_res = self.cs.set_high();
|
|
||||||
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
|
|
||||||
cs_res.map_err(SpiDeviceError::Cs)?;
|
|
||||||
Ok(op_res)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<'d, M, BUS, CS, BusErr, CsErr, Word> embedded_hal_02::blocking::spi::Write<u16> for SpiDevice<'_, M, BUS, CS, Word>
|
|
||||||
where
|
|
||||||
M: RawMutex,
|
|
||||||
BUS: embedded_hal_02::blocking::spi::Write<u16, Error = BusErr>,
|
|
||||||
CS: OutputPin<Error = CsErr>,
|
|
||||||
Word: Copy + 'static,
|
|
||||||
{
|
|
||||||
type Error = SpiDeviceError<BusErr, CsErr>;
|
|
||||||
|
|
||||||
fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
|
|
||||||
self.bus.lock(|bus| {
|
|
||||||
let mut bus = bus.borrow_mut();
|
|
||||||
self.cs.set_low().map_err(SpiDeviceError::Cs)?;
|
|
||||||
let op_res = bus.write(words);
|
|
||||||
let cs_res = self.cs.set_high();
|
|
||||||
let op_res = op_res.map_err(SpiDeviceError::Spi)?;
|
|
||||||
cs_res.map_err(SpiDeviceError::Cs)?;
|
|
||||||
Ok(op_res)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/// SPI device on a shared bus, with its own configuration.
|
/// SPI device on a shared bus, with its own configuration.
|
||||||
///
|
///
|
||||||
|
Loading…
Reference in New Issue
Block a user