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Merge pull request #3554 from chrenderle/rcc
compute lse and lsi frequency for STM32L and STM32U0 series
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commit
4b1be4787a
@ -5,6 +5,7 @@ use crate::pac::rcc::regs::Cfgr;
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pub use crate::pac::rcc::vals::Hsepre as HsePrescaler;
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pub use crate::pac::rcc::vals::Hsepre as HsePrescaler;
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pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Msirange as MSIRange, Ppre as APBPrescaler, Sw as Sysclk};
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pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Msirange as MSIRange, Ppre as APBPrescaler, Sw as Sysclk};
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use crate::pac::{FLASH, RCC};
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use crate::pac::{FLASH, RCC};
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use crate::rcc::LSI_FREQ;
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use crate::time::Hertz;
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use crate::time::Hertz;
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/// HSI speed
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/// HSI speed
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@ -182,6 +183,9 @@ pub(crate) unsafe fn init(config: Config) {
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let rtc = config.ls.init();
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let rtc = config.ls.init();
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let lse = config.ls.lse.map(|l| l.frequency);
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let lsi = config.ls.lsi.then_some(LSI_FREQ);
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let msi = config.msi.map(|range| {
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let msi = config.msi.map(|range| {
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msi_enable(range);
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msi_enable(range);
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msirange_to_hertz(range)
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msirange_to_hertz(range)
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@ -425,12 +429,12 @@ pub(crate) unsafe fn init(config: Config) {
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dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers
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dsi_phy: None, // DSI PLL clock not supported, don't call `RccPeripheral::frequency()` in the drivers
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rtc: rtc,
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rtc: rtc,
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lse: lse,
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lsi: lsi,
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// TODO
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// TODO
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sai1_extclk: None,
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sai1_extclk: None,
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sai2_extclk: None,
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sai2_extclk: None,
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lsi: None,
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lse: None,
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);
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);
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}
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}
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