From 3e00c1ac52ac847db44f83b6d94d493356a990ff Mon Sep 17 00:00:00 2001 From: Eric Yanush Date: Mon, 22 Apr 2024 14:01:48 -0600 Subject: [PATCH] rustfmt whitespace fixes --- embassy-stm32/src/can/bxcan/mod.rs | 2 +- embassy-stm32/src/can/bxcan/registers.rs | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/embassy-stm32/src/can/bxcan/mod.rs b/embassy-stm32/src/can/bxcan/mod.rs index c524c68a9..fa408c260 100644 --- a/embassy-stm32/src/can/bxcan/mod.rs +++ b/embassy-stm32/src/can/bxcan/mod.rs @@ -76,7 +76,7 @@ impl interrupt::typelevel::Handler for SceInterrup // Disable the interrupt, but don't acknowledge the error, so that it can be // forwarded off the the bus message consumer. If we don't provide some way for // downstream code to determine that it has already provided this bus error instance - // to the bus message consumer, we are doomed to re-provide a single error instance for + // to the bus message consumer, we are doomed to re-provide a single error instance for // an indefinite amount of time. let ier = T::regs().ier(); ier.modify(|i| i.set_errie(false)); diff --git a/embassy-stm32/src/can/bxcan/registers.rs b/embassy-stm32/src/can/bxcan/registers.rs index 225b25d8a..446f3ad6f 100644 --- a/embassy-stm32/src/can/bxcan/registers.rs +++ b/embassy-stm32/src/can/bxcan/registers.rs @@ -148,10 +148,10 @@ impl Registers { if !self.0.msr().read().erri() { // This ensures that once a single error instance has // been acknowledged and forwared to the bus message consumer - // we don't continue to re-forward the same error occurrance for an + // we don't continue to re-forward the same error occurrance for an // in-definite amount of time. return None; - } + } // Since we have not already acknowledge the error, and the interrupt was // disabled in the ISR, we will acknowledge the current error and re-enable the interrupt