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made adc example working with default clock configuration and switched in v1 to PCLK/2 per default

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This commit is contained in:
shufps 2024-02-08 11:28:53 +01:00
parent dabe48c3bd
commit 34c71b58cf
2 changed files with 6 additions and 7 deletions
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4
embassy-stm32/src/adc/v1.rs
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@ -76,6 +76,10 @@ impl<'d, T: Instance> Adc<'d, T> {
// tstab = 14 * 1/fadc
delay.delay_us(1);
// set default PCKL/2 on L0s because HSI is disabled in the default clock config
#[cfg(adc_l0)]
T::regs().cfgr2().modify(|reg| reg.set_ckmode(Ckmode::PCLK_DIV2));
// A.7.1 ADC calibration code example
T::regs().cfgr1().modify(|reg| reg.set_dmaen(false));
T::regs().cr().modify(|reg| reg.set_adcal(true));

9
examples/stm32l0/src/bin/adc.rs
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@ -5,7 +5,7 @@ use defmt::*;
use embassy_executor::Spawner;
use embassy_stm32::adc::{Adc, SampleTime};
use embassy_stm32::peripherals::ADC;
use embassy_stm32::{adc, bind_interrupts, Config};
use embassy_stm32::{adc, bind_interrupts};
use embassy_time::{Delay, Timer};
use {defmt_rtt as _, panic_probe as _};
@ -15,12 +15,7 @@ bind_interrupts!(struct Irqs {
#[embassy_executor::main]
async fn main(_spawner: Spawner) {
// enable HSI because default is MSI but ADC doesn't support
// this as clock source on L0s and uses HSI by default
let mut config = Config::default();
config.rcc.hsi = true;
let p = embassy_stm32::init(config);
let p = embassy_stm32::init(Default::default());
info!("Hello World!");
let mut adc = Adc::new(p.ADC, Irqs, &mut Delay);