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stm32/spi: restrict txonly_nosck to SPIv1, it hangs in other versions.
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@ -465,6 +465,7 @@ impl<'d> Spi<'d, Blocking> {
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/// Create a new SPI driver, in TX-only mode, without SCK pin.
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///
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/// This can be useful for bit-banging non-SPI protocols.
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#[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons.
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pub fn new_blocking_txonly_nosck<T: Instance>(
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peri: impl Peripheral<P = T> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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@ -549,6 +550,7 @@ impl<'d> Spi<'d, Async> {
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/// Create a new SPI driver, in TX-only mode, without SCK pin.
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///
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/// This can be useful for bit-banging non-SPI protocols.
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#[cfg(any(spi_v1, spi_f1))] // no SCK pin causes it to hang on spiv2+ for unknown reasons.
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pub fn new_txonly_nosck<T: Instance>(
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peri: impl Peripheral<P = T> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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@ -76,7 +76,7 @@ async fn main(_spawner: Spawner) {
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let mut config = Config::default();
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config.frequency = Hertz(4_000_000);
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let mut spi = Spi::new_txonly_nosck(p.SPI1, p.PB5, p.DMA1_CH3, config);
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let mut spi = Spi::new_txonly(p.SPI1, p.PB3, p.PB5, p.DMA1_CH3, config); // SCK is unused.
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let mut neopixels = Ws2812::new();
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@ -7,34 +7,36 @@ autobins = false
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[features]
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stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"]
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stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"]
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stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"]
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stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"]
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stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"]
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stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]
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stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"]
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stm32f446re = ["embassy-stm32/stm32f446re", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"]
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stm32f429zi = ["embassy-stm32/stm32f429zi", "spi-v1", "chrono", "eth", "stop", "can", "not-gpdma", "dac", "rng"]
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stm32f446re = ["embassy-stm32/stm32f446re", "spi-v1", "chrono", "stop", "can", "not-gpdma", "dac", "sdmmc"]
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stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"]
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stm32g071rb = ["embassy-stm32/stm32g071rb", "cm0", "not-gpdma", "dac", "ucpd"]
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stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "stop", "not-gpdma", "rng", "fdcan", "cordic"]
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stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
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stm32h753zi = ["embassy-stm32/stm32h753zi", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
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stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
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stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "not-gpdma", "rng", "fdcan"]
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stm32h563zi = ["embassy-stm32/stm32h563zi", "spi-v345", "chrono", "eth", "rng", "fdcan", "hash", "cordic", "stop"]
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stm32h753zi = ["embassy-stm32/stm32h753zi", "spi-v345", "chrono", "not-gpdma", "eth", "rng", "fdcan", "hash", "cryp"]
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stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "spi-v345", "chrono", "not-gpdma", "eth", "dac", "rng", "fdcan", "hash", "cryp"]
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stm32h7a3zi = ["embassy-stm32/stm32h7a3zi", "spi-v345", "not-gpdma", "rng", "fdcan"]
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stm32l073rz = ["embassy-stm32/stm32l073rz", "cm0", "not-gpdma", "rng"]
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stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"]
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stm32l152re = ["embassy-stm32/stm32l152re", "spi-v1", "chrono", "not-gpdma"]
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stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"]
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stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng", "hash"]
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stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"]
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stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng", "hash"]
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stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng", "hash", "cordic"]
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stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash
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stm32u585ai = ["embassy-stm32/stm32u585ai", "spi-v345", "chrono", "rng", "hash", "cordic"]
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stm32u5a5zj = ["embassy-stm32/stm32u5a5zj", "spi-v345", "chrono", "rng", "hash"] # FIXME: cordic test cause it crash
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stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"]
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stm32wba52cg = ["embassy-stm32/stm32wba52cg", "chrono", "rng", "hash"]
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stm32wba52cg = ["embassy-stm32/stm32wba52cg", "spi-v345", "chrono", "rng", "hash"]
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stm32wl55jc = ["embassy-stm32/stm32wl55jc-cm4", "not-gpdma", "rng", "chrono"]
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stm32f091rc = ["embassy-stm32/stm32f091rc", "cm0", "not-gpdma", "chrono"]
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stm32h503rb = ["embassy-stm32/stm32h503rb", "rng", "stop"]
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stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
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stm32h503rb = ["embassy-stm32/stm32h503rb", "spi-v345", "rng", "stop"]
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stm32h7s3l8 = ["embassy-stm32/stm32h7s3l8", "spi-v345", "rng", "cordic", "hash"] # TODO: fdcan crashes, cryp dma hangs.
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stm32u083rc = ["embassy-stm32/stm32u083rc", "cm0", "rng", "chrono"]
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spi-v1 = []
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spi-v345 = []
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cryp = []
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hash = []
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eth = ["embassy-executor/task-arena-size-16384"]
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@ -62,27 +62,49 @@ async fn main(_spawner: Spawner) {
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// Assert the RCC bit gets disabled on drop.
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#[cfg(feature = "stm32f429zi")]
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{
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defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en());
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drop(spi);
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defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en());
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}
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#[cfg(not(feature = "stm32f429zi"))]
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core::mem::drop(spi);
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defmt::assert!(embassy_stm32::pac::RCC.apb2enr().read().spi1en());
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drop(spi);
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#[cfg(feature = "stm32f429zi")]
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defmt::assert!(!embassy_stm32::pac::RCC.apb2enr().read().spi1en());
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// test rx-only configuration
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let mut spi = Spi::new_blocking_rxonly(&mut spi_peri, &mut sck, &mut miso, spi_config);
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let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
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mosi.set_high();
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let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
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mosi_out.set_high();
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spi.blocking_read(&mut buf).unwrap();
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assert_eq!(buf, [0xff; 9]);
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mosi.set_low();
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mosi_out.set_low();
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spi.blocking_read(&mut buf).unwrap();
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assert_eq!(buf, [0x00; 9]);
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drop(mosi_out);
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drop(spi);
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// Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave.
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let mut spi = Spi::new_blocking_txonly(&mut spi_peri, &mut sck, &mut mosi, spi_config);
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spi.blocking_transfer(&mut buf, &data).unwrap();
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spi.blocking_transfer_in_place(&mut buf).unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.blocking_read(&mut buf).unwrap();
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spi.blocking_transfer::<u8>(&mut [], &[]).unwrap();
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spi.blocking_transfer_in_place::<u8>(&mut []).unwrap();
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spi.blocking_read::<u8>(&mut []).unwrap();
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spi.blocking_write::<u8>(&[]).unwrap();
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drop(spi);
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// Test tx-only nosck.
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#[cfg(feature = "spi-v1")]
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{
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let mut spi = Spi::new_blocking_txonly_nosck(&mut spi_peri, &mut mosi, spi_config);
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spi.blocking_transfer(&mut buf, &data).unwrap();
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spi.blocking_transfer_in_place(&mut buf).unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.blocking_read(&mut buf).unwrap();
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spi.blocking_transfer::<u8>(&mut [], &[]).unwrap();
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spi.blocking_transfer_in_place::<u8>(&mut []).unwrap();
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spi.blocking_read::<u8>(&mut []).unwrap();
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spi.blocking_write::<u8>(&[]).unwrap();
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drop(spi);
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}
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info!("Test OK");
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cortex_m::asm::bkpt();
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@ -88,31 +88,53 @@ async fn main(_spawner: Spawner) {
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&mut sck,
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&mut miso,
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// SPIv1/f1 requires txdma even if rxonly.
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#[cfg(not(any(
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feature = "stm32h503rb",
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feature = "stm32h563zi",
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feature = "stm32h753zi",
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feature = "stm32h755zi",
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feature = "stm32h7a3zi",
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feature = "stm32h7s3l8",
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feature = "stm32u585ai",
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feature = "stm32u5a5zj",
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feature = "stm32wba52cg",
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)))]
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#[cfg(not(feature = "spi-v345"))]
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&mut tx_dma,
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&mut rx_dma,
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spi_config,
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);
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let mut mosi = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
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mosi.set_high();
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let mut mosi_out = Output::new(&mut mosi, Level::Low, Speed::VeryHigh);
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mosi_out.set_high();
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spi.read(&mut buf).await.unwrap();
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assert_eq!(buf, [0xff; 9]);
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mosi.set_low();
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spi.blocking_read(&mut buf).unwrap();
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assert_eq!(buf, [0xff; 9]);
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spi.read(&mut buf).await.unwrap();
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assert_eq!(buf, [0xff; 9]);
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spi.read(&mut buf).await.unwrap();
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assert_eq!(buf, [0xff; 9]);
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spi.blocking_read(&mut buf).unwrap();
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assert_eq!(buf, [0xff; 9]);
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spi.blocking_read(&mut buf).unwrap();
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assert_eq!(buf, [0xff; 9]);
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mosi_out.set_low();
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spi.read(&mut buf).await.unwrap();
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assert_eq!(buf, [0x00; 9]);
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drop(mosi_out);
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drop(spi);
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// Test tx-only. Just check it doesn't hang, not much else we can do without using SPI slave.
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let mut spi = Spi::new_txonly(&mut spi_peri, &mut sck, &mut mosi, &mut tx_dma, spi_config);
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spi.blocking_write(&buf).unwrap();
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spi.write(&buf).await.unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.write(&buf).await.unwrap();
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spi.write(&buf).await.unwrap();
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drop(spi);
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// Test tx-only nosck.
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#[cfg(feature = "spi-v1")]
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{
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let mut spi = Spi::new_txonly_nosck(&mut spi_peri, &mut mosi, &mut tx_dma, spi_config);
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spi.blocking_write(&buf).unwrap();
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spi.write(&buf).await.unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.blocking_write(&buf).unwrap();
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spi.write(&buf).await.unwrap();
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spi.write(&buf).await.unwrap();
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drop(spi);
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}
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info!("Test OK");
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cortex_m::asm::bkpt();
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