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[UCPD] Disable dead-battery resistor for all families
Using the code from PR #2683, thank you @ExplodingWaffle Removes the dead-battery as selectable option because its unclear if it can be re-enabled. Also there is no use case for it because the same resistor can be configured with the sink option.
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@ -283,9 +283,8 @@ pub fn init(config: Config) -> Peripherals {
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}
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}
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unsafe {
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unsafe {
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// TODO: refactor into mod ucpd
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#[cfg(ucpd)]
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#[cfg(ucpd)]
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ucpd_init(
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ucpd::init(
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cs,
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cs,
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#[cfg(peri_ucpd1)]
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#[cfg(peri_ucpd1)]
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config.enable_ucpd1_dead_battery,
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config.enable_ucpd1_dead_battery,
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@ -334,41 +333,3 @@ pub fn init(config: Config) -> Peripherals {
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p
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p
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})
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})
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}
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}
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#[cfg(ucpd)]
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/// Safety: must only be called when all UCPDs are disabled (e.g. at startup)
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unsafe fn ucpd_init(
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_cs: critical_section::CriticalSection,
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#[cfg(peri_ucpd1)] ucpd1_db_enable: bool,
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#[cfg(peri_ucpd2)] ucpd2_db_enable: bool,
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) {
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#[cfg(stm32g0x1)]
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{
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// according to RM0444 (STM32G0x1) section 8.1.1:
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// when UCPD is disabled setting the strobe will disable dead battery
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// (which is enabled after reset) but if UCPD is enabled, setting the
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// strobe will apply the CC pin configuration from the control register
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// (which is why we need to be careful about when we call this)
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crate::pac::SYSCFG.cfgr1().modify(|w| {
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w.set_ucpd1_strobe(ucpd1_db_enable);
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w.set_ucpd2_strobe(ucpd2_db_enable);
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});
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}
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#[cfg(any(stm32g4, stm32l5))]
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{
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crate::pac::PWR.cr3().modify(|w| {
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#[cfg(stm32g4)]
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w.set_ucpd1_dbdis(!ucpd1_db_enable);
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#[cfg(stm32l5)]
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w.set_ucpd_dbdis(!ucpd1_db_enable);
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})
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}
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#[cfg(any(stm32h5, stm32u5))]
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{
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crate::pac::PWR.ucpdr().modify(|w| {
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w.set_ucpd_dbdis(!ucpd1_db_enable);
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})
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}
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}
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@ -28,6 +28,42 @@ use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
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pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState};
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pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState};
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use crate::rcc::RccPeripheral;
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use crate::rcc::RccPeripheral;
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pub(crate) fn init(
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_cs: critical_section::CriticalSection,
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#[cfg(peri_ucpd1)] ucpd1_db_enable: bool,
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#[cfg(peri_ucpd2)] ucpd2_db_enable: bool,
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) {
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#[cfg(stm32g0x1)]
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{
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// according to RM0444 (STM32G0x1) section 8.1.1:
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// when UCPD is disabled setting the strobe will disable dead battery
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// (which is enabled after reset) but if UCPD is enabled, setting the
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// strobe will apply the CC pin configuration from the control register
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// (which is why we need to be careful about when we call this)
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crate::pac::SYSCFG.cfgr1().modify(|w| {
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w.set_ucpd1_strobe(ucpd1_db_enable);
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w.set_ucpd2_strobe(ucpd2_db_enable);
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});
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}
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#[cfg(any(stm32g4, stm32l5))]
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{
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crate::pac::PWR.cr3().modify(|w| {
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#[cfg(stm32g4)]
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w.set_ucpd1_dbdis(!ucpd1_db_enable);
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#[cfg(stm32l5)]
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w.set_ucpd_dbdis(!ucpd1_db_enable);
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})
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}
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#[cfg(any(stm32h5, stm32u5))]
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{
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crate::pac::PWR.ucpdr().modify(|w| {
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w.set_ucpd_dbdis(!ucpd1_db_enable);
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})
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}
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}
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/// Pull-up or Pull-down resistor state of both CC lines.
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/// Pull-up or Pull-down resistor state of both CC lines.
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#[derive(Debug, Clone, Copy, PartialEq)]
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#[derive(Debug, Clone, Copy, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -35,9 +71,6 @@ pub enum CcPull {
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/// Analog PHY for CC pin disabled.
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/// Analog PHY for CC pin disabled.
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Disabled,
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Disabled,
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/// Rd=5.1k pull-down resistor enabled when the corresponding DBCC pin is high.
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SinkDeadBattery,
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/// Rd=5.1k pull-down resistor.
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/// Rd=5.1k pull-down resistor.
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Sink,
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Sink,
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@ -192,20 +225,21 @@ impl<'d, T: Instance> CcPhy<'d, T> {
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CcPull::Source3_0A => 3,
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CcPull::Source3_0A => 3,
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_ => 0,
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_ => 0,
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});
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});
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w.set_ccenable(if cc_pull != CcPull::SinkDeadBattery {
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w.set_ccenable(if cc_pull == CcPull::Disabled {
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Ccenable::BOTH
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} else {
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Ccenable::DISABLED
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Ccenable::DISABLED
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} else {
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Ccenable::BOTH
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});
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});
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});
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});
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// Disable dead-battery pull-down resistors which are enabled by default on boot.
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// Disable dead-battery pull-down resistors which are enabled by default on boot.
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critical_section::with(|_| {
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critical_section::with(|cs| {
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// TODO: other families
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init(
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#[cfg(stm32g4)]
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cs,
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crate::pac::PWR
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false,
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.cr3()
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#[cfg(peri_ucpd2)]
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.modify(|w| w.set_ucpd1_dbdis(cc_pull != CcPull::SinkDeadBattery));
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false,
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);
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});
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});
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}
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}
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