Merge pull request #2731 from embassy-rs/sealed4

use private_bounds for sealed traits.
This commit is contained in:
Dario Nieuwenhuis 2024-03-23 01:55:13 +01:00 committed by GitHub
commit 2fd6f0e718
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5 changed files with 44 additions and 59 deletions

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@ -30,14 +30,12 @@ macro_rules! interrupt_mod {
pub mod typelevel {
use super::InterruptExt;
mod sealed {
pub trait Interrupt {}
}
trait SealedInterrupt {}
/// Type-level interrupt.
///
/// This trait is implemented for all typelevel interrupt types in this module.
pub trait Interrupt: sealed::Interrupt {
pub trait Interrupt: SealedInterrupt {
/// Interrupt enum variant.
///
@ -105,7 +103,7 @@ macro_rules! interrupt_mod {
#[doc=stringify!($irqs)]
#[doc=" typelevel interrupt."]
pub enum $irqs {}
impl sealed::Interrupt for $irqs{}
impl SealedInterrupt for $irqs{}
impl Interrupt for $irqs {
const IRQ: super::Interrupt = super::Interrupt::$irqs;
}

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@ -2,12 +2,10 @@
mod w5500;
pub use w5500::W5500;
mod w5100s;
use embedded_hal_async::spi::SpiDevice;
pub use w5100s::W5100S;
pub(crate) mod sealed {
use embedded_hal_async::spi::SpiDevice;
pub trait Chip {
pub(crate) trait SealedChip {
type Address;
const COMMON_MODE: Self::Address;
@ -33,18 +31,11 @@ pub(crate) mod sealed {
fn rx_addr(addr: u16) -> Self::Address;
fn tx_addr(addr: u16) -> Self::Address;
async fn bus_read<SPI: SpiDevice>(
spi: &mut SPI,
address: Self::Address,
data: &mut [u8],
) -> Result<(), SPI::Error>;
async fn bus_write<SPI: SpiDevice>(
spi: &mut SPI,
address: Self::Address,
data: &[u8],
) -> Result<(), SPI::Error>;
}
async fn bus_read<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &mut [u8])
-> Result<(), SPI::Error>;
async fn bus_write<SPI: SpiDevice>(spi: &mut SPI, address: Self::Address, data: &[u8]) -> Result<(), SPI::Error>;
}
/// Trait for Wiznet chips.
pub trait Chip: sealed::Chip {}
#[allow(private_bounds)]
pub trait Chip: SealedChip {}

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@ -8,7 +8,7 @@ const RX_BASE: u16 = 0x6000;
pub enum W5100S {}
impl super::Chip for W5100S {}
impl super::sealed::Chip for W5100S {
impl super::SealedChip for W5100S {
type Address = u16;
const COMMON_MODE: Self::Address = 0x00;

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@ -12,7 +12,7 @@ pub enum RegisterBlock {
pub enum W5500 {}
impl super::Chip for W5500 {}
impl super::sealed::Chip for W5500 {
impl super::SealedChip for W5500 {
type Address = (RegisterBlock, u16);
const COMMON_MODE: Self::Address = (RegisterBlock::Common, 0x00);

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@ -226,12 +226,9 @@ pub mod windows_version {
pub const WIN10: u32 = 0x0A000000;
}
mod sealed {
use core::mem::size_of;
/// A trait for descriptors
pub trait Descriptor: Sized {
const TYPE: super::DescriptorType;
/// A trait for descriptors
trait Descriptor: Sized {
const TYPE: DescriptorType;
/// The size of the descriptor's header.
fn size(&self) -> usize {
@ -239,14 +236,11 @@ mod sealed {
}
fn write_to(&self, buf: &mut [u8]);
}
pub trait DescriptorSet: Descriptor {
const LENGTH_OFFSET: usize;
}
}
use sealed::*;
trait DescriptorSet: Descriptor {
const LENGTH_OFFSET: usize;
}
/// Copies the data of `t` into `buf`.
///
@ -412,9 +406,11 @@ impl DescriptorSet for FunctionSubsetHeader {
// Feature Descriptors
/// A marker trait for feature descriptors that are valid at the device level.
#[allow(private_bounds)]
pub trait DeviceLevelDescriptor: Descriptor {}
/// A marker trait for feature descriptors that are valid at the function level.
#[allow(private_bounds)]
pub trait FunctionLevelDescriptor: Descriptor {}
/// Table 13. Microsoft OS 2.0 compatible ID descriptor.