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simplify if/else handling on ringbuffer

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This commit is contained in:
Alexandros Liarokapis 2024-10-02 13:10:07 +03:00
parent f0d2ebdc7e
commit 2ec05da5dd
1 changed files with 4 additions and 7 deletions
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11
embassy-stm32/src/dma/ringbuffer/mod.rs
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@ -111,10 +111,8 @@ impl<'a, W: Word> ReadableDmaRingBuffer<'a, W> {
let diff = self.write_index.diff(self.cap(), &self.read_index); let diff = self.write_index.diff(self.cap(), &self.read_index);
if diff < 0 { if diff < 0 {
return Err(Error::DmaUnsynced); Err(Error::DmaUnsynced)
} } else if diff > self.cap() as isize {
if diff > self.cap() as isize {
Err(Error::Overrun) Err(Error::Overrun)
} else { } else {
Ok(diff as usize) Ok(diff as usize)
@ -223,11 +221,10 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> {
let diff = self.write_index.diff(self.cap(), &self.read_index); let diff = self.write_index.diff(self.cap(), &self.read_index);
if diff > self.cap() as isize {
return Err(Error::DmaUnsynced);
}
if diff < 0 { if diff < 0 {
Err(Error::Overrun) Err(Error::Overrun)
} else if diff > self.cap() as isize {
Err(Error::DmaUnsynced)
} else { } else {
Ok(self.cap().saturating_sub(diff as usize)) Ok(self.cap().saturating_sub(diff as usize))
} }