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stm32/spi: rename rxdma, txdma -> rx_dma, tx_dma.
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09a284e959
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@ -97,8 +97,8 @@ pub struct Spi<'d, T: Instance, M: PeriMode> {
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sck: Option<PeripheralRef<'d, AnyPin>>,
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mosi: Option<PeripheralRef<'d, AnyPin>>,
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miso: Option<PeripheralRef<'d, AnyPin>>,
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txdma: Option<ChannelAndRequest<'d>>,
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rxdma: Option<ChannelAndRequest<'d>>,
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tx_dma: Option<ChannelAndRequest<'d>>,
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rx_dma: Option<ChannelAndRequest<'d>>,
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_phantom: PhantomData<M>,
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current_word_size: word_impl::Config,
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}
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@ -109,8 +109,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> {
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sck: Option<PeripheralRef<'d, AnyPin>>,
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mosi: Option<PeripheralRef<'d, AnyPin>>,
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miso: Option<PeripheralRef<'d, AnyPin>>,
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txdma: Option<ChannelAndRequest<'d>>,
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rxdma: Option<ChannelAndRequest<'d>>,
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tx_dma: Option<ChannelAndRequest<'d>>,
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rx_dma: Option<ChannelAndRequest<'d>>,
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config: Config,
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) -> Self {
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into_ref!(peri);
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@ -209,8 +209,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> {
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sck,
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mosi,
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miso,
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txdma,
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rxdma,
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tx_dma,
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rx_dma,
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current_word_size: <u8 as SealedWord>::CONFIG,
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_phantom: PhantomData,
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}
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@ -479,8 +479,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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sck: impl Peripheral<P = impl SckPin<T>> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
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txdma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rxdma: impl Peripheral<P = impl RxDma<T>> + 'd,
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tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
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config: Config,
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) -> Self {
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Self::new_inner(
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@ -488,8 +488,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
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new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
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new_pin!(miso, AFType::Input, Speed::VeryHigh),
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new_dma!(txdma),
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new_dma!(rxdma),
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new_dma!(tx_dma),
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new_dma!(rx_dma),
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config,
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)
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}
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@ -499,7 +499,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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peri: impl Peripheral<P = T> + 'd,
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sck: impl Peripheral<P = impl SckPin<T>> + 'd,
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miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
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rxdma: impl Peripheral<P = impl RxDma<T>> + 'd,
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rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
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config: Config,
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) -> Self {
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Self::new_inner(
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@ -508,7 +508,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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None,
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new_pin!(miso, AFType::Input, Speed::VeryHigh),
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None,
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new_dma!(rxdma),
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new_dma!(rx_dma),
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config,
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)
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}
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@ -518,7 +518,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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peri: impl Peripheral<P = T> + 'd,
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sck: impl Peripheral<P = impl SckPin<T>> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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txdma: impl Peripheral<P = impl TxDma<T>> + 'd,
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tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
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config: Config,
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) -> Self {
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Self::new_inner(
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@ -526,7 +526,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
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new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
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None,
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new_dma!(txdma),
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new_dma!(tx_dma),
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None,
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config,
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)
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@ -538,7 +538,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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pub fn new_txonly_nosck(
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peri: impl Peripheral<P = T> + 'd,
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mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
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txdma: impl Peripheral<P = impl TxDma<T>> + 'd,
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tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
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config: Config,
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) -> Self {
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Self::new_inner(
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@ -546,7 +546,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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None,
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new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
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None,
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new_dma!(txdma),
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new_dma!(tx_dma),
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None,
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config,
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)
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@ -556,8 +556,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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/// Useful for on chip peripherals like SUBGHZ which are hardwired.
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pub fn new_subghz(
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peri: impl Peripheral<P = T> + 'd,
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txdma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rxdma: impl Peripheral<P = impl RxDma<T>> + 'd,
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tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
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) -> Self {
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// see RM0453 rev 1 section 7.2.13 page 291
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// The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two.
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@ -569,17 +569,17 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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config.bit_order = BitOrder::MsbFirst;
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config.frequency = freq;
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Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config)
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Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config)
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}
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#[allow(dead_code)]
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pub(crate) fn new_internal(
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peri: impl Peripheral<P = T> + 'd,
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txdma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rxdma: impl Peripheral<P = impl RxDma<T>> + 'd,
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tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
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rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
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config: Config,
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) -> Self {
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Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config)
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Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config)
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}
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/// SPI write, using DMA.
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@ -594,7 +594,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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});
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let tx_dst = T::REGS.tx_ptr();
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let tx_f = unsafe { self.txdma.as_mut().unwrap().write(data, tx_dst, Default::default()) };
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let tx_f = unsafe { self.tx_dma.as_mut().unwrap().write(data, tx_dst, Default::default()) };
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set_txdmaen(T::REGS, true);
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T::REGS.cr1().modify(|w| {
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@ -632,12 +632,12 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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let clock_byte_count = data.len();
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let rx_src = T::REGS.rx_ptr();
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let rx_f = unsafe { self.rxdma.as_mut().unwrap().read(rx_src, data, Default::default()) };
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let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read(rx_src, data, Default::default()) };
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let tx_dst = T::REGS.tx_ptr();
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let clock_byte = 0x00u8;
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let tx_f = unsafe {
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self.txdma
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self.tx_dma
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.as_mut()
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.unwrap()
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.write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default())
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@ -679,11 +679,11 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
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set_rxdmaen(T::REGS, true);
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let rx_src = T::REGS.rx_ptr();
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let rx_f = unsafe { self.rxdma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) };
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let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) };
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let tx_dst = T::REGS.tx_ptr();
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let tx_f = unsafe {
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self.txdma
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self.tx_dma
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.as_mut()
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.unwrap()
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.write_raw(write, tx_dst, Default::default())
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