Merge pull request #2405 from Sizurka/stm32g0-usb

stm32: Add G0 USB RCC and example

embassy-stm32/src/rcc/g0.rs

@@ -72,6 +72,22 @@ pub enum PllSource {
     HSE(Hertz, HseMode),
 }
 
+/// Sets the source for the 48MHz clock to the USB peripheral.
+#[cfg(any(stm32g0b1, stm32g0c1, stm32g0b0))]
+pub enum UsbSrc {
+    /// Use the High Speed Internal Oscillator. The CRS must be used to calibrate the
+    /// oscillator to comply with the USB specification for oscillator tolerance.
+    #[cfg(any(stm32g0b1, stm32g0c1))]
+    Hsi48(super::Hsi48Config),
+    /// Use the PLLQ output. The PLL must be configured to output a 48MHz clock. The
+    /// PLL needs to be using the HSE source to comply with the USB specification for oscillator
+    /// tolerance.
+    PllQ,
+    /// Use the HSE source directly.  The HSE must be a 48MHz source.  The HSE source must comply
+    /// with the USB specification for oscillator tolerance.
+    HSE,
+}
+
 /// Clocks configutation
 pub struct Config {
     pub mux: ClockSrc,
@@ -79,6 +95,8 @@ pub struct Config {
     pub apb_pre: APBPrescaler,
     pub low_power_run: bool,
     pub ls: super::LsConfig,
+    #[cfg(any(stm32g0b1, stm32g0c1, stm32g0b0))]
+    pub usb_src: Option<UsbSrc>,
 }
 
 impl Default for Config {
@@ -90,6 +108,8 @@ impl Default for Config {
             apb_pre: APBPrescaler::DIV1,
             low_power_run: false,
             ls: Default::default(),
+            #[cfg(any(stm32g0b1, stm32g0c1, stm32g0b0))]
+            usb_src: None,
         }
     }
 }
@@ -303,13 +323,42 @@ pub(crate) unsafe fn init(config: Config) {
     let lsi_freq = (sw == Sw::LSI).then_some(super::LSI_FREQ);
     let hse_freq = (sw == Sw::HSE).then_some(sys_clk);
 
+    #[cfg(any(stm32g0b1, stm32g0c1, stm32g0b0))]
+    let hsi48_freq = config.usb_src.and_then(|config| {
+        match config {
+            UsbSrc::PllQ => {
+                // Make sure the PLLQ is enabled and running at 48Mhz
+                assert!(pll1_q_freq.is_some() && pll1_q_freq.unwrap().0 == 48_000_000);
+                RCC.ccipr2()
+                    .modify(|w| w.set_usbsel(crate::pac::rcc::vals::Usbsel::PLL1_Q));
+                None
+            }
+            UsbSrc::HSE => {
+                // Make sure the HSE is enabled and running at 48Mhz
+                assert!(hse_freq.is_some() && hse_freq.unwrap().0 == 48_000_000);
+                RCC.ccipr2()
+                    .modify(|w| w.set_usbsel(crate::pac::rcc::vals::Usbsel::HSE));
+                None
+            }
+            #[cfg(any(stm32g0b1, stm32g0c1))]
+            UsbSrc::Hsi48(config) => {
+                let freq = super::init_hsi48(config);
+                RCC.ccipr2()
+                    .modify(|w| w.set_usbsel(crate::pac::rcc::vals::Usbsel::HSI48));
+                Some(freq)
+            }
+        }
+    });
+    #[cfg(not(any(stm32g0b1, stm32g0c1, stm32g0b0)))]
+    let hsi48_freq: Option<Hertz> = None;
+
     set_freqs(Clocks {
         sys: sys_clk,
         hclk1: ahb_freq,
         pclk1: apb_freq,
         pclk1_tim: apb_tim_freq,
         hsi: hsi_freq,
-        hsi48: None,
+        hsi48: hsi48_freq,
         hsi_div_8: hsi_div_8_freq,
         hse: hse_freq,
         lse: lse_freq,

examples/stm32g0/.cargo/config.toml

@@ -1,6 +1,6 @@
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
-runner = "probe-rs run --chip STM32G071RBTx"
+# replace STM32G0B1RETx with your chip as listed in `probe-rs chip list`
+runner = "probe-rs run --chip STM32G0B1RETx"
 
 [build]
 target = "thumbv6m-none-eabi"

examples/stm32g0/Cargo.toml

@@ -5,11 +5,13 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"
 
 [dependencies]
-# Change stm32g071rb to your chip name, if necessary.
-embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g071rb", "memory-x", "unstable-pac", "exti"]  }
+# Change stm32g0b1re to your chip name, if necessary.
+embassy-stm32 = { version = "0.1.0", path = "../../embassy-stm32", features = [ "defmt", "time-driver-any", "stm32g0b1re", "memory-x", "unstable-pac", "exti"]  }
 embassy-sync = { version = "0.5.0", path = "../../embassy-sync", features = ["defmt"] }
 embassy-executor = { version = "0.4.0", path = "../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "defmt", "integrated-timers"] }
 embassy-time = { version = "0.2", path = "../../embassy-time", features = ["defmt", "defmt-timestamp-uptime", "tick-hz-32_768"] }
+embassy-usb = { version = "0.1.0", path = "../../embassy-usb", default-features = false, features = ["defmt"] }
+embassy-futures = { version = "0.1.0", path = "../../embassy-futures" }
 
 defmt = "0.3"
 defmt-rtt = "0.4"

examples/stm32g0/src/bin/usb_serial.rs

@@ -0,0 +1,99 @@
+#![no_std]
+#![no_main]
+
+use defmt::{panic, *};
+use embassy_executor::Spawner;
+use embassy_futures::join::join;
+use embassy_stm32::rcc::{Hsi48Config, UsbSrc};
+use embassy_stm32::usb::{Driver, Instance};
+use embassy_stm32::{bind_interrupts, peripherals, usb, Config};
+use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
+use embassy_usb::driver::EndpointError;
+use embassy_usb::Builder;
+use {defmt_rtt as _, panic_probe as _};
+
+bind_interrupts!(struct Irqs {
+    USB_UCPD1_2 => usb::InterruptHandler<peripherals::USB>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    let mut config = Config::default();
+    config.rcc.usb_src = Some(UsbSrc::Hsi48(Hsi48Config {
+        sync_from_usb: true,
+        ..Default::default()
+    }));
+    let p = embassy_stm32::init(config);
+
+    info!("Hello World!");
+
+    // Create the driver, from the HAL.
+    let driver = Driver::new(p.USB, Irqs, p.PA12, p.PA11);
+
+    // Create embassy-usb Config
+    let config = embassy_usb::Config::new(0xc0de, 0xcafe);
+    //config.max_packet_size_0 = 64;
+
+    // Create embassy-usb DeviceBuilder using the driver and config.
+    // It needs some buffers for building the descriptors.
+    let mut device_descriptor = [0; 256];
+    let mut config_descriptor = [0; 256];
+    let mut bos_descriptor = [0; 256];
+    let mut control_buf = [0; 7];
+
+    let mut state = State::new();
+
+    let mut builder = Builder::new(
+        driver,
+        config,
+        &mut device_descriptor,
+        &mut config_descriptor,
+        &mut bos_descriptor,
+        &mut [], // no msos descriptors
+        &mut control_buf,
+    );
+
+    // Create classes on the builder.
+    let mut class = CdcAcmClass::new(&mut builder, &mut state, 64);
+
+    // Build the builder.
+    let mut usb = builder.build();
+
+    // Run the USB device.
+    let usb_fut = usb.run();
+
+    // Do stuff with the class!
+    let echo_fut = async {
+        loop {
+            class.wait_connection().await;
+            info!("Connected");
+            let _ = echo(&mut class).await;
+            info!("Disconnected");
+        }
+    };
+
+    // Run everything concurrently.
+    // If we had made everything `'static` above instead, we could do this using separate tasks instead.
+    join(usb_fut, echo_fut).await;
+}
+
+struct Disconnected {}
+
+impl From<EndpointError> for Disconnected {
+    fn from(val: EndpointError) -> Self {
+        match val {
+            EndpointError::BufferOverflow => panic!("Buffer overflow"),
+            EndpointError::Disabled => Disconnected {},
+        }
+    }
+}
+
+async fn echo<'d, T: Instance + 'd>(class: &mut CdcAcmClass<'d, Driver<'d, T>>) -> Result<(), Disconnected> {
+    let mut buf = [0; 64];
+    loop {
+        let n = class.read_packet(&mut buf).await?;
+        let data = &buf[..n];
+        info!("data: {:x}", data);
+        class.write_packet(data).await?;
+    }
+}