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https://github.com/embassy-rs/embassy.git
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stm32/flash: add support for f1.
This commit is contained in:
parent
0d5711b219
commit
208ad8fbfc
8
.vscode/settings.json
vendored
8
.vscode/settings.json
vendored
@ -15,10 +15,16 @@
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//"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
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//"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
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"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
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"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
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//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
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//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
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"rust-analyzer.cargo.features": [
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"stm32f103c8",
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"time-driver-any",
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"unstable-pac",
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"exti",
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],
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"rust-analyzer.linkedProjects": [
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"rust-analyzer.linkedProjects": [
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// Uncomment ONE line for the chip you want to work on.
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// Uncomment ONE line for the chip you want to work on.
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// This makes rust-analyzer work on the example crate and all its dependencies.
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// This makes rust-analyzer work on the example crate and all its dependencies.
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"examples/stm32l4/Cargo.toml",
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"embassy-stm32/Cargo.toml",
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// "examples/nrf52840-rtic/Cargo.toml",
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// "examples/nrf52840-rtic/Cargo.toml",
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// "examples/nrf5340/Cargo.toml",
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// "examples/nrf5340/Cargo.toml",
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// "examples/nrf-rtos-trace/Cargo.toml",
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// "examples/nrf-rtos-trace/Cargo.toml",
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@ -57,7 +57,7 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa
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rand_core = "0.6.3"
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rand_core = "0.6.3"
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sdio-host = "0.5.0"
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sdio-host = "0.5.0"
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critical-section = "1.1"
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critical-section = "1.1"
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790" }
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d5096244fa0b7992454a894a2aeaa369ae674222" }
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vcell = "0.1.3"
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vcell = "0.1.3"
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bxcan = "0.7.0"
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bxcan = "0.7.0"
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nb = "1.0.0"
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nb = "1.0.0"
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@ -75,7 +75,7 @@ critical-section = { version = "1.1", features = ["std"] }
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[build-dependencies]
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[build-dependencies]
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proc-macro2 = "1.0.36"
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proc-macro2 = "1.0.36"
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quote = "1.0.15"
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quote = "1.0.15"
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790", default-features = false, features = ["metadata"]}
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stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-d5096244fa0b7992454a894a2aeaa369ae674222", default-features = false, features = ["metadata"]}
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[features]
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[features]
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@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
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pub(crate) unsafe fn unlock() {
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pub(crate) unsafe fn unlock() {
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
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pub(crate) unsafe fn unlock() {
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pub(crate) unsafe fn unlock() {
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_fkeyr(0x4567_0123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_fkeyr(0xCDEF_89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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@ -59,6 +59,14 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
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w.set_strt(true);
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w.set_strt(true);
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});
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});
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// Wait for at least one clock cycle before reading the
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// BSY bit, because there is a one-cycle delay between
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// setting the STRT bit and the BSY bit being asserted
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// by hardware. See STM32F105xx, STM32F107xx device errata,
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// section 2.2.8
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#[cfg(stm32f1)]
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pac::FLASH.cr().read();
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let mut ret: Result<(), Error> = wait_ready_blocking();
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let mut ret: Result<(), Error> = wait_ready_blocking();
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if !pac::FLASH.sr().read().eop() {
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if !pac::FLASH.sr().read().eop() {
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@ -227,8 +227,8 @@ pub(crate) unsafe fn lock() {
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pub(crate) unsafe fn unlock() {
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pub(crate) unsafe fn unlock() {
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_key(0x45670123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_key(0xCDEF89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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@ -20,8 +20,8 @@ pub(crate) unsafe fn lock() {
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pub(crate) unsafe fn unlock() {
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pub(crate) unsafe fn unlock() {
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_key(0x4567_0123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_key(0xCDEF_89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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@ -25,8 +25,8 @@ pub(crate) unsafe fn unlock() {
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// Unlock flash
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// Unlock flash
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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@ -27,13 +27,13 @@ pub(crate) unsafe fn lock() {
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pub(crate) unsafe fn unlock() {
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pub(crate) unsafe fn unlock() {
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if pac::FLASH.bank(0).cr().read().lock() {
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if pac::FLASH.bank(0).cr().read().lock() {
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pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0x4567_0123));
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pac::FLASH.bank(0).keyr().write_value(0x4567_0123);
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pac::FLASH.bank(0).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
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pac::FLASH.bank(0).keyr().write_value(0xCDEF_89AB);
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}
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}
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if is_dual_bank() {
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if is_dual_bank() {
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if pac::FLASH.bank(1).cr().read().lock() {
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if pac::FLASH.bank(1).cr().read().lock() {
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pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0x4567_0123));
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pac::FLASH.bank(1).keyr().write_value(0x4567_0123);
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pac::FLASH.bank(1).keyr().write(|w| w.set_keyr(0xCDEF_89AB));
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pac::FLASH.bank(1).keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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}
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}
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@ -29,21 +29,21 @@ pub(crate) unsafe fn unlock() {
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#[cfg(any(flash_wl, flash_wb, flash_l4))]
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#[cfg(any(flash_wl, flash_wb, flash_l4))]
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{
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{
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if pac::FLASH.cr().read().lock() {
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if pac::FLASH.cr().read().lock() {
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pac::FLASH.keyr().write(|w| w.set_keyr(0x4567_0123));
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pac::FLASH.keyr().write_value(0x4567_0123);
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pac::FLASH.keyr().write(|w| w.set_keyr(0xCDEF_89AB));
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pac::FLASH.keyr().write_value(0xCDEF_89AB);
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}
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}
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}
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}
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#[cfg(any(flash_l0, flash_l1))]
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#[cfg(any(flash_l0, flash_l1))]
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{
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{
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if pac::FLASH.pecr().read().pelock() {
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if pac::FLASH.pecr().read().pelock() {
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pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x89ABCDEF));
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pac::FLASH.pekeyr().write_value(0x89AB_CDEF);
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pac::FLASH.pekeyr().write(|w| w.set_pekeyr(0x02030405));
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pac::FLASH.pekeyr().write_value(0x0203_0405);
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}
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}
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if pac::FLASH.pecr().read().prglock() {
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if pac::FLASH.pecr().read().prglock() {
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pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x8C9DAEBF));
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pac::FLASH.prgkeyr().write_value(0x8C9D_AEBF);
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pac::FLASH.prgkeyr().write(|w| w.set_prgkeyr(0x13141516));
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pac::FLASH.prgkeyr().write_value(0x1314_1516);
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}
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}
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}
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}
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}
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}
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@ -95,7 +95,7 @@ pub enum FlashBank {
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#[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_wl, flash_wb), path = "l.rs")]
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#[cfg_attr(any(flash_l0, flash_l1, flash_l4, flash_wl, flash_wb), path = "l.rs")]
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#[cfg_attr(flash_f0, path = "f0.rs")]
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#[cfg_attr(flash_f0, path = "f0.rs")]
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#[cfg_attr(flash_f3, path = "f3.rs")]
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#[cfg_attr(any(flash_f1, flash_f3), path = "f1f3.rs")]
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#[cfg_attr(flash_f4, path = "f4.rs")]
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#[cfg_attr(flash_f4, path = "f4.rs")]
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#[cfg_attr(flash_f7, path = "f7.rs")]
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#[cfg_attr(flash_f7, path = "f7.rs")]
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#[cfg_attr(any(flash_g0, flash_g4), path = "g.rs")]
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#[cfg_attr(any(flash_g0, flash_g4), path = "g.rs")]
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@ -103,8 +103,8 @@ pub enum FlashBank {
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#[cfg_attr(flash_h7ab, path = "h7.rs")]
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#[cfg_attr(flash_h7ab, path = "h7.rs")]
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#[cfg_attr(
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#[cfg_attr(
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not(any(
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not(any(
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flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f3, flash_f4, flash_f7, flash_g0, flash_g4,
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flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f1, flash_f3, flash_f4, flash_f7, flash_g0,
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flash_h7, flash_h7ab
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flash_g4, flash_h7, flash_h7ab
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)),
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)),
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path = "other.rs"
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path = "other.rs"
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)]
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)]
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