mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-21 22:32:29 +00:00
Make clocks repr C.
Add shared data. Modify freq functions to use shared data. Modify examples to use new init/
This commit is contained in:
Dion Dokter
parent
b1ea90a87e
commit
203297b569
@ -181,6 +181,9 @@ split-pc3 = ["_split-pins-enabled"]
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## internal use only
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_split-pins-enabled = []
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## internal use only
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_dual-core = []
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#! ## Chip-selection features
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#! Select your chip by specifying the model as a feature, e.g. `stm32c011d6`.
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#! Check the `Cargo.toml` for the latest list of supported chips.
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@ -1004,40 +1007,40 @@ stm32h743xg = [ "stm32-metapac/stm32h743xg" ]
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stm32h743xi = [ "stm32-metapac/stm32h743xi" ]
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stm32h743zg = [ "stm32-metapac/stm32h743zg" ]
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stm32h743zi = [ "stm32-metapac/stm32h743zi" ]
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stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7" ]
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stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4" ]
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stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7" ]
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stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4" ]
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stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7" ]
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stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4" ]
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stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7" ]
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stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4" ]
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stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7" ]
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stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4" ]
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stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7" ]
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stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4" ]
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stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7" ]
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stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4" ]
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stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7" ]
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stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4" ]
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stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7" ]
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stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4" ]
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stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7" ]
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stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4" ]
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stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7" ]
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stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4" ]
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stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7" ]
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stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4" ]
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stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7" ]
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stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4" ]
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stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7" ]
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stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4" ]
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stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7" ]
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stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4" ]
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stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7" ]
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stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4" ]
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stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7" ]
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stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4" ]
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stm32h745bg-cm7 = [ "stm32-metapac/stm32h745bg-cm7", "_dual-core" ]
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stm32h745bg-cm4 = [ "stm32-metapac/stm32h745bg-cm4", "_dual-core" ]
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stm32h745bi-cm7 = [ "stm32-metapac/stm32h745bi-cm7", "_dual-core" ]
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stm32h745bi-cm4 = [ "stm32-metapac/stm32h745bi-cm4", "_dual-core" ]
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stm32h745ig-cm7 = [ "stm32-metapac/stm32h745ig-cm7", "_dual-core" ]
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stm32h745ig-cm4 = [ "stm32-metapac/stm32h745ig-cm4", "_dual-core" ]
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stm32h745ii-cm7 = [ "stm32-metapac/stm32h745ii-cm7", "_dual-core" ]
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stm32h745ii-cm4 = [ "stm32-metapac/stm32h745ii-cm4", "_dual-core" ]
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stm32h745xg-cm7 = [ "stm32-metapac/stm32h745xg-cm7", "_dual-core" ]
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stm32h745xg-cm4 = [ "stm32-metapac/stm32h745xg-cm4", "_dual-core" ]
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stm32h745xi-cm7 = [ "stm32-metapac/stm32h745xi-cm7", "_dual-core" ]
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stm32h745xi-cm4 = [ "stm32-metapac/stm32h745xi-cm4", "_dual-core" ]
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stm32h745zg-cm7 = [ "stm32-metapac/stm32h745zg-cm7", "_dual-core" ]
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stm32h745zg-cm4 = [ "stm32-metapac/stm32h745zg-cm4", "_dual-core" ]
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stm32h745zi-cm7 = [ "stm32-metapac/stm32h745zi-cm7", "_dual-core" ]
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stm32h745zi-cm4 = [ "stm32-metapac/stm32h745zi-cm4", "_dual-core" ]
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stm32h747ag-cm7 = [ "stm32-metapac/stm32h747ag-cm7", "_dual-core" ]
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stm32h747ag-cm4 = [ "stm32-metapac/stm32h747ag-cm4", "_dual-core" ]
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stm32h747ai-cm7 = [ "stm32-metapac/stm32h747ai-cm7", "_dual-core" ]
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stm32h747ai-cm4 = [ "stm32-metapac/stm32h747ai-cm4", "_dual-core" ]
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stm32h747bg-cm7 = [ "stm32-metapac/stm32h747bg-cm7", "_dual-core" ]
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stm32h747bg-cm4 = [ "stm32-metapac/stm32h747bg-cm4", "_dual-core" ]
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stm32h747bi-cm7 = [ "stm32-metapac/stm32h747bi-cm7", "_dual-core" ]
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stm32h747bi-cm4 = [ "stm32-metapac/stm32h747bi-cm4", "_dual-core" ]
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stm32h747ig-cm7 = [ "stm32-metapac/stm32h747ig-cm7", "_dual-core" ]
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stm32h747ig-cm4 = [ "stm32-metapac/stm32h747ig-cm4", "_dual-core" ]
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stm32h747ii-cm7 = [ "stm32-metapac/stm32h747ii-cm7", "_dual-core" ]
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stm32h747ii-cm4 = [ "stm32-metapac/stm32h747ii-cm4", "_dual-core" ]
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stm32h747xg-cm7 = [ "stm32-metapac/stm32h747xg-cm7", "_dual-core" ]
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stm32h747xg-cm4 = [ "stm32-metapac/stm32h747xg-cm4", "_dual-core" ]
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stm32h747xi-cm7 = [ "stm32-metapac/stm32h747xi-cm7", "_dual-core" ]
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stm32h747xi-cm4 = [ "stm32-metapac/stm32h747xi-cm4", "_dual-core" ]
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stm32h747zi-cm7 = [ "stm32-metapac/stm32h747zi-cm7", "_dual-core" ]
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stm32h747zi-cm4 = [ "stm32-metapac/stm32h747zi-cm4", "_dual-core" ]
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stm32h750ib = [ "stm32-metapac/stm32h750ib" ]
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stm32h750vb = [ "stm32-metapac/stm32h750vb" ]
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stm32h750xb = [ "stm32-metapac/stm32h750xb" ]
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@ -1048,24 +1051,24 @@ stm32h753ii = [ "stm32-metapac/stm32h753ii" ]
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stm32h753vi = [ "stm32-metapac/stm32h753vi" ]
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stm32h753xi = [ "stm32-metapac/stm32h753xi" ]
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stm32h753zi = [ "stm32-metapac/stm32h753zi" ]
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stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7" ]
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stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4" ]
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stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7" ]
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stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4" ]
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stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7" ]
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stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4" ]
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stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7" ]
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stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4" ]
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stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7" ]
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stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4" ]
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stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7" ]
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stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4" ]
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stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7" ]
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stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4" ]
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stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7" ]
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stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4" ]
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stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7" ]
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stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4" ]
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stm32h755bi-cm7 = [ "stm32-metapac/stm32h755bi-cm7", "_dual-core" ]
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stm32h755bi-cm4 = [ "stm32-metapac/stm32h755bi-cm4", "_dual-core" ]
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stm32h755ii-cm7 = [ "stm32-metapac/stm32h755ii-cm7", "_dual-core" ]
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stm32h755ii-cm4 = [ "stm32-metapac/stm32h755ii-cm4", "_dual-core" ]
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stm32h755xi-cm7 = [ "stm32-metapac/stm32h755xi-cm7", "_dual-core" ]
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stm32h755xi-cm4 = [ "stm32-metapac/stm32h755xi-cm4", "_dual-core" ]
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stm32h755zi-cm7 = [ "stm32-metapac/stm32h755zi-cm7", "_dual-core" ]
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stm32h755zi-cm4 = [ "stm32-metapac/stm32h755zi-cm4", "_dual-core" ]
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stm32h757ai-cm7 = [ "stm32-metapac/stm32h757ai-cm7", "_dual-core" ]
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stm32h757ai-cm4 = [ "stm32-metapac/stm32h757ai-cm4", "_dual-core" ]
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stm32h757bi-cm7 = [ "stm32-metapac/stm32h757bi-cm7", "_dual-core" ]
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stm32h757bi-cm4 = [ "stm32-metapac/stm32h757bi-cm4", "_dual-core" ]
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stm32h757ii-cm7 = [ "stm32-metapac/stm32h757ii-cm7", "_dual-core" ]
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stm32h757ii-cm4 = [ "stm32-metapac/stm32h757ii-cm4", "_dual-core" ]
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stm32h757xi-cm7 = [ "stm32-metapac/stm32h757xi-cm7", "_dual-core" ]
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stm32h757xi-cm4 = [ "stm32-metapac/stm32h757xi-cm4", "_dual-core" ]
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stm32h757zi-cm7 = [ "stm32-metapac/stm32h757zi-cm7", "_dual-core" ]
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stm32h757zi-cm4 = [ "stm32-metapac/stm32h757zi-cm4", "_dual-core" ]
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stm32h7a3ag = [ "stm32-metapac/stm32h7a3ag" ]
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stm32h7a3ai = [ "stm32-metapac/stm32h7a3ai" ]
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stm32h7a3ig = [ "stm32-metapac/stm32h7a3ig" ]
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@ -1598,14 +1601,14 @@ stm32wba55he = [ "stm32-metapac/stm32wba55he" ]
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stm32wba55hg = [ "stm32-metapac/stm32wba55hg" ]
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stm32wba55ue = [ "stm32-metapac/stm32wba55ue" ]
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stm32wba55ug = [ "stm32-metapac/stm32wba55ug" ]
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stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4" ]
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stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p" ]
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stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4" ]
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stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p" ]
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stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4" ]
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stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p" ]
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stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4" ]
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stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p" ]
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stm32wl54cc-cm4 = [ "stm32-metapac/stm32wl54cc-cm4", "_dual-core" ]
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stm32wl54cc-cm0p = [ "stm32-metapac/stm32wl54cc-cm0p", "_dual-core" ]
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stm32wl54jc-cm4 = [ "stm32-metapac/stm32wl54jc-cm4", "_dual-core" ]
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stm32wl54jc-cm0p = [ "stm32-metapac/stm32wl54jc-cm0p", "_dual-core" ]
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stm32wl55cc-cm4 = [ "stm32-metapac/stm32wl55cc-cm4", "_dual-core" ]
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stm32wl55cc-cm0p = [ "stm32-metapac/stm32wl55cc-cm0p", "_dual-core" ]
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stm32wl55jc-cm4 = [ "stm32-metapac/stm32wl55jc-cm4", "_dual-core" ]
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stm32wl55jc-cm0p = [ "stm32-metapac/stm32wl55jc-cm0p", "_dual-core" ]
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stm32wle4c8 = [ "stm32-metapac/stm32wle4c8" ]
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stm32wle4cb = [ "stm32-metapac/stm32wle4cb" ]
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stm32wle4cc = [ "stm32-metapac/stm32wle4cc" ]
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@ -480,7 +480,7 @@ fn main() {
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self.clock_names.insert(name.to_ascii_lowercase());
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quote!(unsafe {
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unwrap!(
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crate::rcc::get_freqs().#clock_name,
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crate::rcc::get_freqs().#clock_name.to_hertz(),
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"peripheral '{}' is configured to use the '{}' clock, which is not running. \
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Either enable it in 'config.rcc' or change 'config.rcc.mux' to use another clock",
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#peripheral,
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@ -713,9 +713,10 @@ fn main() {
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g.extend(quote! {
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#[derive(Clone, Copy, Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[repr(C)]
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pub struct Clocks {
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#(
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pub #clock_idents: Option<crate::time::Hertz>,
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pub #clock_idents: crate::time::MaybeHertz,
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)*
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}
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});
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@ -732,7 +733,7 @@ fn main() {
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$($(#[$m])* $k: $v,)*
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};
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crate::rcc::set_freqs(crate::rcc::Clocks {
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#( #clock_idents: all.#clock_idents, )*
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#( #clock_idents: all.#clock_idents.into(), )*
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});
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}
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};
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@ -273,7 +273,123 @@ impl Default for Config {
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/// This returns the peripheral singletons that can be used for creating drivers.
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///
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/// This should only be called once at startup, otherwise it panics.
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#[cfg(not(feature = "_dual-core"))]
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pub fn init(config: Config) -> Peripherals {
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init_hw(config)
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}
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#[cfg(feature = "_dual-core")]
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mod dual_core {
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use rcc::Clocks;
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use super::*;
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use core::{
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mem::MaybeUninit,
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sync::atomic::{AtomicUsize, Ordering},
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};
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/// Object containing data that embassy needs to share between cores.
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///
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/// It cannot be initialized by the user. The intended use is:
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///
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/// ```
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/// #[link_section = ".ram_d3"]
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/// static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
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///
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/// init_secondary(&SHARED_DATA);
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/// ```
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///
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/// This static must be placed in the same position for both cores. How and where this is done is left to the user.
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pub struct SharedData {
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init_flag: AtomicUsize,
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clocks: MaybeUninit<Clocks>,
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}
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const INIT_DONE_FLAG: usize = 0xca11ab1e;
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/// Initialize the `embassy-stm32` HAL with the provided configuration.
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/// This function does the actual initialization of the hardware, in contrast to [init_secondary] or [try_init_secondary].
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/// Any core can do the init, but it's important only one core does it.
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///
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/// This returns the peripheral singletons that can be used for creating drivers.
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///
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/// This should only be called once at startup, otherwise it panics.
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///
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/// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
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/// for more information on its requirements.
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pub fn init_primary(config: Config, shared_data: &'static MaybeUninit<SharedData>) -> Peripherals {
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let shared_data = unsafe { shared_data.assume_init_ref() };
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rcc::set_freqs_ptr(&shared_data.clocks);
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let p = init_hw(config);
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shared_data.init_flag.store(INIT_DONE_FLAG, Ordering::SeqCst);
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p
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}
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/// Try to initialize the `embassy-stm32` HAL based on the init done by the other core using [init_primary].
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///
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/// This returns the peripheral singletons that can be used for creating drivers if the other core is done with its init.
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/// If the other core is not done yet, this will return `None`.
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///
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/// This should only be called once at startup, otherwise it may panic.
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///
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/// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
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/// for more information on its requirements.
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pub fn try_init_secondary(shared_data: &'static MaybeUninit<SharedData>) -> Option<Peripherals> {
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let shared_data = unsafe { shared_data.assume_init_ref() };
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||||
if shared_data
|
||||
.init_flag
|
||||
.compare_exchange(INIT_DONE_FLAG, 0, Ordering::SeqCst, Ordering::SeqCst)
|
||||
.is_err()
|
||||
{
|
||||
return None;
|
||||
}
|
||||
|
||||
Some(init_secondary_hw(shared_data))
|
||||
}
|
||||
|
||||
/// Initialize the `embassy-stm32` HAL based on the init done by the other core using [init_primary].
|
||||
///
|
||||
/// This returns the peripheral singletons that can be used for creating drivers when the other core is done with its init.
|
||||
/// If the other core is not done yet, this will spinloop wait on it.
|
||||
///
|
||||
/// This should only be called once at startup, otherwise it may panic.
|
||||
///
|
||||
/// The `shared_data` is used to coordinate the init with the second core. Read the [SharedData] docs
|
||||
/// for more information on its requirements.
|
||||
pub fn init_secondary(shared_data: &'static MaybeUninit<SharedData>) -> Peripherals {
|
||||
let shared_data = unsafe { shared_data.assume_init_ref() };
|
||||
|
||||
while shared_data
|
||||
.init_flag
|
||||
.compare_exchange(INIT_DONE_FLAG, 0, Ordering::SeqCst, Ordering::SeqCst)
|
||||
.is_err()
|
||||
{}
|
||||
|
||||
init_secondary_hw(shared_data)
|
||||
}
|
||||
|
||||
fn init_secondary_hw(shared_data: &'static SharedData) -> Peripherals {
|
||||
rcc::set_freqs_ptr(&shared_data.clocks);
|
||||
|
||||
// We use different timers on the different cores, so we have to still initialize one here
|
||||
critical_section::with(|cs| {
|
||||
// must be after rcc init
|
||||
#[cfg(feature = "_time-driver")]
|
||||
time_driver::init(cs);
|
||||
});
|
||||
|
||||
Peripherals::take()
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "_dual-core")]
|
||||
pub use dual_core::*;
|
||||
|
||||
fn init_hw(config: Config) -> Peripherals {
|
||||
critical_section::with(|cs| {
|
||||
let p = Peripherals::take_with_cs(cs);
|
||||
|
||||
|
||||
@ -48,11 +48,22 @@ pub(crate) static mut REFCOUNT_STOP1: u32 = 0;
|
||||
/// May be read without a critical section
|
||||
pub(crate) static mut REFCOUNT_STOP2: u32 = 0;
|
||||
|
||||
#[cfg(not(feature = "_dual-core"))]
|
||||
/// Frozen clock frequencies
|
||||
///
|
||||
/// The existence of this value indicates that the clock configuration can no longer be changed
|
||||
static mut CLOCK_FREQS: MaybeUninit<Clocks> = MaybeUninit::uninit();
|
||||
|
||||
#[cfg(feature = "_dual-core")]
|
||||
static CLOCK_FREQS_PTR: core::sync::atomic::AtomicPtr<MaybeUninit<Clocks>> =
|
||||
core::sync::atomic::AtomicPtr::new(core::ptr::null_mut());
|
||||
|
||||
#[cfg(feature = "_dual-core")]
|
||||
pub(crate) fn set_freqs_ptr(freqs: &'static MaybeUninit<Clocks>) {
|
||||
CLOCK_FREQS_PTR.store(freqs as *const _ as *mut _, core::sync::atomic::Ordering::SeqCst);
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "_dual-core"))]
|
||||
/// Sets the clock frequencies
|
||||
///
|
||||
/// Safety: Sets a mutable global.
|
||||
@ -61,11 +72,27 @@ pub(crate) unsafe fn set_freqs(freqs: Clocks) {
|
||||
CLOCK_FREQS = MaybeUninit::new(freqs);
|
||||
}
|
||||
|
||||
#[cfg(feature = "_dual-core")]
|
||||
/// Sets the clock frequencies
|
||||
///
|
||||
/// Safety: Sets a mutable global.
|
||||
pub(crate) unsafe fn set_freqs(freqs: Clocks) {
|
||||
debug!("rcc: {:?}", freqs);
|
||||
CLOCK_FREQS_PTR.load(core::sync::atomic::Ordering::SeqCst).write(MaybeUninit::new(freqs));
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "_dual-core"))]
|
||||
/// Safety: Reads a mutable global.
|
||||
pub(crate) unsafe fn get_freqs() -> &'static Clocks {
|
||||
CLOCK_FREQS.assume_init_ref()
|
||||
}
|
||||
|
||||
#[cfg(feature = "_dual-core")]
|
||||
/// Safety: Reads a mutable global.
|
||||
pub(crate) unsafe fn get_freqs() -> &'static Clocks {
|
||||
unwrap!(CLOCK_FREQS_PTR.load(core::sync::atomic::Ordering::SeqCst).as_ref()).assume_init_ref()
|
||||
}
|
||||
|
||||
pub(crate) trait SealedRccPeripheral {
|
||||
fn frequency() -> Hertz;
|
||||
const RCC_INFO: RccInfo;
|
||||
|
||||
@ -168,7 +168,7 @@ impl Rtc {
|
||||
|
||||
fn frequency() -> Hertz {
|
||||
let freqs = unsafe { crate::rcc::get_freqs() };
|
||||
freqs.rtc.unwrap()
|
||||
freqs.rtc.to_hertz().unwrap()
|
||||
}
|
||||
|
||||
/// Acquire a [`RtcTimeProvider`] instance.
|
||||
|
||||
@ -87,3 +87,39 @@ impl Div<Hertz> for Hertz {
|
||||
self.0 / rhs.0
|
||||
}
|
||||
}
|
||||
|
||||
#[repr(C)]
|
||||
#[derive(Eq, PartialEq, Ord, PartialOrd, Clone, Copy, Debug, Default)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
/// A variant on [Hertz] that acts as an `Option<Hertz>` that is smaller and repr C.
|
||||
///
|
||||
/// An `Option<Hertz>` can be `.into()`'d into this type and back.
|
||||
/// The only restriction is that that [Hertz] cannot have the value 0 since that's
|
||||
/// seen as the `None` variant.
|
||||
pub struct MaybeHertz(u32);
|
||||
|
||||
impl MaybeHertz {
|
||||
/// Same as calling the `.into()` function, but without type inference.
|
||||
pub fn to_hertz(self) -> Option<Hertz> {
|
||||
self.into()
|
||||
}
|
||||
}
|
||||
|
||||
impl From<Option<Hertz>> for MaybeHertz {
|
||||
fn from(value: Option<Hertz>) -> Self {
|
||||
match value {
|
||||
Some(Hertz(0)) => panic!("Hertz cannot be 0"),
|
||||
Some(Hertz(val)) => Self(val),
|
||||
None => Self(0),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl From<MaybeHertz> for Option<Hertz> {
|
||||
fn from(value: MaybeHertz) -> Self {
|
||||
match value {
|
||||
MaybeHertz(0) => None,
|
||||
MaybeHertz(val) => Some(Hertz(val)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
[target.thumbv7em-none-eabihf]
|
||||
runner = 'probe-rs run --chip STM32H755ZITx'
|
||||
runner = 'probe-rs run --chip STM32H755ZITx --catch-hardfault --always-print-stacktrace'
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
MEMORY
|
||||
{
|
||||
FLASH : ORIGIN = 0x08100000, LENGTH = 1024K /* BANK_2 */
|
||||
RAM : ORIGIN = 0x30000000, LENGTH = 128K /* SRAM1 */
|
||||
RAM : ORIGIN = 0x10000000, LENGTH = 128K /* SRAM1 */
|
||||
RAM_D3 : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 */
|
||||
}
|
||||
|
||||
|
||||
@ -1,15 +1,23 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
use core::mem::MaybeUninit;
|
||||
|
||||
use defmt::*;
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_stm32::gpio::{Level, Output, Speed};
|
||||
use embassy_stm32::{
|
||||
gpio::{Level, Output, Speed},
|
||||
SharedData,
|
||||
};
|
||||
use embassy_time::Timer;
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
#[link_section = ".ram_d3"]
|
||||
static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let p = embassy_stm32::init(Default::default());
|
||||
let p = embassy_stm32::init_secondary(&SHARED_DATA);
|
||||
info!("Hello World!");
|
||||
|
||||
let mut led = Output::new(p.PE1, Level::High, Speed::Low);
|
||||
@ -17,10 +25,10 @@ async fn main(_spawner: Spawner) {
|
||||
loop {
|
||||
info!("high");
|
||||
led.set_high();
|
||||
Timer::after_millis(500).await;
|
||||
Timer::after_millis(250).await;
|
||||
|
||||
info!("low");
|
||||
led.set_low();
|
||||
Timer::after_millis(500).await;
|
||||
Timer::after_millis(250).await;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
[target.thumbv7em-none-eabihf]
|
||||
runner = 'probe-rs run --chip STM32H755ZITx'
|
||||
runner = 'probe-rs run --chip STM32H755ZITx --catch-hardfault --always-print-stacktrace'
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
|
||||
|
||||
@ -1,12 +1,20 @@
|
||||
#![no_std]
|
||||
#![no_main]
|
||||
|
||||
use core::mem::MaybeUninit;
|
||||
|
||||
use defmt::*;
|
||||
use embassy_executor::Spawner;
|
||||
use embassy_stm32::gpio::{Level, Output, Speed};
|
||||
use embassy_stm32::{
|
||||
gpio::{Level, Output, Speed},
|
||||
SharedData,
|
||||
};
|
||||
use embassy_time::Timer;
|
||||
use {defmt_rtt as _, panic_probe as _};
|
||||
|
||||
#[link_section = ".ram_d3"]
|
||||
static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit();
|
||||
|
||||
#[embassy_executor::main]
|
||||
async fn main(_spawner: Spawner) {
|
||||
let mut config = embassy_stm32::Config::default();
|
||||
@ -31,7 +39,7 @@ async fn main(_spawner: Spawner) {
|
||||
config.rcc.voltage_scale = VoltageScale::Scale1;
|
||||
config.rcc.supply_config = SupplyConfig::DirectSMPS;
|
||||
}
|
||||
let p = embassy_stm32::init(config);
|
||||
let p = embassy_stm32::init_primary(config, &SHARED_DATA);
|
||||
info!("Hello World!");
|
||||
|
||||
let mut led = Output::new(p.PB14, Level::High, Speed::Low);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user