mirror of
https://github.com/embassy-rs/embassy.git
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otg: fix build with defmt enabled.
This commit is contained in:
Dario Nieuwenhuis
parent
c9abff53d7
commit
1ca53e286b
@ -110,7 +110,17 @@ default = ["rt"]
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rt = ["stm32-metapac/rt"]
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## Use [`defmt`](https://docs.rs/defmt/latest/defmt/) for logging
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defmt = ["dep:defmt", "embassy-sync/defmt", "embassy-embedded-hal/defmt", "embassy-hal-internal/defmt", "embedded-io-async/defmt-03", "embassy-usb-driver/defmt", "embassy-net-driver/defmt", "embassy-time?/defmt"]
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defmt = [
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"dep:defmt",
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"embassy-sync/defmt",
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"embassy-embedded-hal/defmt",
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"embassy-hal-internal/defmt",
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"embedded-io-async/defmt-03",
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"embassy-usb-driver/defmt",
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"embassy-net-driver/defmt",
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"embassy-time?/defmt",
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"embassy-usb-synopsys-otg/defmt",
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]
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exti = []
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low-power = [ "dep:embassy-executor", "embassy-executor?/arch-cortex-m", "time" ]
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@ -108,287 +108,287 @@ impl Otg {
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}
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#[doc = "Control and status register"]
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#[inline(always)]
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pub const fn gotgctl(self) -> Reg<regs::Gotgctl, RW> {
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pub fn gotgctl(self) -> Reg<regs::Gotgctl, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0usize) as _) }
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}
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#[doc = "Interrupt register"]
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#[inline(always)]
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pub const fn gotgint(self) -> Reg<regs::Gotgint, RW> {
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pub fn gotgint(self) -> Reg<regs::Gotgint, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x04usize) as _) }
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}
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#[doc = "AHB configuration register"]
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#[inline(always)]
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pub const fn gahbcfg(self) -> Reg<regs::Gahbcfg, RW> {
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pub fn gahbcfg(self) -> Reg<regs::Gahbcfg, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x08usize) as _) }
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}
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#[doc = "USB configuration register"]
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#[inline(always)]
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pub const fn gusbcfg(self) -> Reg<regs::Gusbcfg, RW> {
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pub fn gusbcfg(self) -> Reg<regs::Gusbcfg, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
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}
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#[doc = "Reset register"]
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#[inline(always)]
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pub const fn grstctl(self) -> Reg<regs::Grstctl, RW> {
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pub fn grstctl(self) -> Reg<regs::Grstctl, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x10usize) as _) }
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}
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#[doc = "Core interrupt register"]
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#[inline(always)]
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pub const fn gintsts(self) -> Reg<regs::Gintsts, RW> {
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pub fn gintsts(self) -> Reg<regs::Gintsts, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x14usize) as _) }
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}
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#[doc = "Interrupt mask register"]
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#[inline(always)]
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pub const fn gintmsk(self) -> Reg<regs::Gintmsk, RW> {
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pub fn gintmsk(self) -> Reg<regs::Gintmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x18usize) as _) }
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}
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#[doc = "Receive status debug read register"]
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#[inline(always)]
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pub const fn grxstsr(self) -> Reg<regs::Grxsts, R> {
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pub fn grxstsr(self) -> Reg<regs::Grxsts, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
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}
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#[doc = "Status read and pop register"]
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#[inline(always)]
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pub const fn grxstsp(self) -> Reg<regs::Grxsts, R> {
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pub fn grxstsp(self) -> Reg<regs::Grxsts, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x20usize) as _) }
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}
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#[doc = "Receive FIFO size register"]
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#[inline(always)]
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pub const fn grxfsiz(self) -> Reg<regs::Grxfsiz, RW> {
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pub fn grxfsiz(self) -> Reg<regs::Grxfsiz, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x24usize) as _) }
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}
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#[doc = "Endpoint 0 transmit FIFO size register (device mode)"]
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#[inline(always)]
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pub const fn dieptxf0(self) -> Reg<regs::Fsiz, RW> {
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pub fn dieptxf0(self) -> Reg<regs::Fsiz, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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}
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#[doc = "Non-periodic transmit FIFO size register (host mode)"]
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#[inline(always)]
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pub const fn hnptxfsiz(self) -> Reg<regs::Fsiz, RW> {
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pub fn hnptxfsiz(self) -> Reg<regs::Fsiz, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x28usize) as _) }
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}
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#[doc = "Non-periodic transmit FIFO/queue status register (host mode)"]
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#[inline(always)]
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pub const fn hnptxsts(self) -> Reg<regs::Hnptxsts, R> {
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pub fn hnptxsts(self) -> Reg<regs::Hnptxsts, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
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}
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#[doc = "OTG I2C access register"]
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#[inline(always)]
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pub const fn gi2cctl(self) -> Reg<regs::Gi2cctl, RW> {
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pub fn gi2cctl(self) -> Reg<regs::Gi2cctl, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x30usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_1xxx"]
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#[inline(always)]
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pub const fn gccfg_v1(self) -> Reg<regs::GccfgV1, RW> {
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pub fn gccfg_v1(self) -> Reg<regs::GccfgV1, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_\\[23\\]xxx"]
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#[inline(always)]
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pub const fn gccfg_v2(self) -> Reg<regs::GccfgV2, RW> {
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pub fn gccfg_v2(self) -> Reg<regs::GccfgV2, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "General core configuration register, for core_id 0x0000_5xxx"]
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#[inline(always)]
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pub const fn gccfg_v3(self) -> Reg<regs::GccfgV3, RW> {
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pub fn gccfg_v3(self) -> Reg<regs::GccfgV3, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x38usize) as _) }
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}
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#[doc = "Core ID register"]
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#[inline(always)]
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pub const fn cid(self) -> Reg<regs::Cid, RW> {
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pub fn cid(self) -> Reg<regs::Cid, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x3cusize) as _) }
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}
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#[doc = "OTG core LPM configuration register"]
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#[inline(always)]
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pub const fn glpmcfg(self) -> Reg<regs::Glpmcfg, RW> {
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pub fn glpmcfg(self) -> Reg<regs::Glpmcfg, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x54usize) as _) }
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}
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#[doc = "Host periodic transmit FIFO size register"]
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#[inline(always)]
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pub const fn hptxfsiz(self) -> Reg<regs::Fsiz, RW> {
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pub fn hptxfsiz(self) -> Reg<regs::Fsiz, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0100usize) as _) }
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}
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#[doc = "Device IN endpoint transmit FIFO size register"]
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#[inline(always)]
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pub const fn dieptxf(self, n: usize) -> Reg<regs::Fsiz, RW> {
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pub fn dieptxf(self, n: usize) -> Reg<regs::Fsiz, RW> {
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assert!(n < 7usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0104usize + n * 4usize) as _) }
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}
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#[doc = "Host configuration register"]
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#[inline(always)]
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pub const fn hcfg(self) -> Reg<regs::Hcfg, RW> {
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pub fn hcfg(self) -> Reg<regs::Hcfg, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0400usize) as _) }
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}
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#[doc = "Host frame interval register"]
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#[inline(always)]
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pub const fn hfir(self) -> Reg<regs::Hfir, RW> {
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pub fn hfir(self) -> Reg<regs::Hfir, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0404usize) as _) }
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}
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#[doc = "Host frame number/frame time remaining register"]
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#[inline(always)]
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pub const fn hfnum(self) -> Reg<regs::Hfnum, R> {
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pub fn hfnum(self) -> Reg<regs::Hfnum, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0408usize) as _) }
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}
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#[doc = "Periodic transmit FIFO/queue status register"]
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#[inline(always)]
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pub const fn hptxsts(self) -> Reg<regs::Hptxsts, RW> {
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pub fn hptxsts(self) -> Reg<regs::Hptxsts, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0410usize) as _) }
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}
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#[doc = "Host all channels interrupt register"]
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#[inline(always)]
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pub const fn haint(self) -> Reg<regs::Haint, R> {
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pub fn haint(self) -> Reg<regs::Haint, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0414usize) as _) }
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}
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#[doc = "Host all channels interrupt mask register"]
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#[inline(always)]
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pub const fn haintmsk(self) -> Reg<regs::Haintmsk, RW> {
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pub fn haintmsk(self) -> Reg<regs::Haintmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0418usize) as _) }
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}
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#[doc = "Host port control and status register"]
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#[inline(always)]
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pub const fn hprt(self) -> Reg<regs::Hprt, RW> {
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pub fn hprt(self) -> Reg<regs::Hprt, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0440usize) as _) }
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}
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#[doc = "Host channel characteristics register"]
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#[inline(always)]
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pub const fn hcchar(self, n: usize) -> Reg<regs::Hcchar, RW> {
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pub fn hcchar(self, n: usize) -> Reg<regs::Hcchar, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0500usize + n * 32usize) as _) }
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}
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#[doc = "Host channel split control register"]
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#[inline(always)]
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pub const fn hcsplt(self, n: usize) -> Reg<u32, RW> {
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pub fn hcsplt(self, n: usize) -> Reg<u32, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0504usize + n * 32usize) as _) }
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}
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#[doc = "Host channel interrupt register"]
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#[inline(always)]
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pub const fn hcint(self, n: usize) -> Reg<regs::Hcint, RW> {
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pub fn hcint(self, n: usize) -> Reg<regs::Hcint, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0508usize + n * 32usize) as _) }
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}
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#[doc = "Host channel mask register"]
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#[inline(always)]
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pub const fn hcintmsk(self, n: usize) -> Reg<regs::Hcintmsk, RW> {
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pub fn hcintmsk(self, n: usize) -> Reg<regs::Hcintmsk, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x050cusize + n * 32usize) as _) }
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}
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#[doc = "Host channel transfer size register"]
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#[inline(always)]
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pub const fn hctsiz(self, n: usize) -> Reg<regs::Hctsiz, RW> {
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pub fn hctsiz(self, n: usize) -> Reg<regs::Hctsiz, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0510usize + n * 32usize) as _) }
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}
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#[doc = "Host channel DMA address register"]
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#[inline(always)]
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pub const fn hcdma(self, n: usize) -> Reg<u32, RW> {
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pub fn hcdma(self, n: usize) -> Reg<u32, RW> {
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assert!(n < 12usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0514usize + n * 32usize) as _) }
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}
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#[doc = "Device configuration register"]
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#[inline(always)]
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pub const fn dcfg(self) -> Reg<regs::Dcfg, RW> {
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pub fn dcfg(self) -> Reg<regs::Dcfg, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0800usize) as _) }
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}
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#[doc = "Device control register"]
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#[inline(always)]
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pub const fn dctl(self) -> Reg<regs::Dctl, RW> {
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pub fn dctl(self) -> Reg<regs::Dctl, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0804usize) as _) }
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}
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#[doc = "Device status register"]
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#[inline(always)]
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pub const fn dsts(self) -> Reg<regs::Dsts, R> {
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pub fn dsts(self) -> Reg<regs::Dsts, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0808usize) as _) }
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}
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#[doc = "Device IN endpoint common interrupt mask register"]
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#[inline(always)]
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pub const fn diepmsk(self) -> Reg<regs::Diepmsk, RW> {
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pub fn diepmsk(self) -> Reg<regs::Diepmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0810usize) as _) }
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}
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#[doc = "Device OUT endpoint common interrupt mask register"]
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#[inline(always)]
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pub const fn doepmsk(self) -> Reg<regs::Doepmsk, RW> {
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pub fn doepmsk(self) -> Reg<regs::Doepmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0814usize) as _) }
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}
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#[doc = "Device all endpoints interrupt register"]
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#[inline(always)]
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pub const fn daint(self) -> Reg<regs::Daint, R> {
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pub fn daint(self) -> Reg<regs::Daint, R> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0818usize) as _) }
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}
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#[doc = "All endpoints interrupt mask register"]
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#[inline(always)]
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pub const fn daintmsk(self) -> Reg<regs::Daintmsk, RW> {
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pub fn daintmsk(self) -> Reg<regs::Daintmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x081cusize) as _) }
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}
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#[doc = "Device VBUS discharge time register"]
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#[inline(always)]
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pub const fn dvbusdis(self) -> Reg<regs::Dvbusdis, RW> {
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pub fn dvbusdis(self) -> Reg<regs::Dvbusdis, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0828usize) as _) }
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}
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#[doc = "Device VBUS pulsing time register"]
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#[inline(always)]
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pub const fn dvbuspulse(self) -> Reg<regs::Dvbuspulse, RW> {
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pub fn dvbuspulse(self) -> Reg<regs::Dvbuspulse, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x082cusize) as _) }
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}
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#[doc = "Device IN endpoint FIFO empty interrupt mask register"]
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#[inline(always)]
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pub const fn diepempmsk(self) -> Reg<regs::Diepempmsk, RW> {
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pub fn diepempmsk(self) -> Reg<regs::Diepempmsk, RW> {
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unsafe { Reg::from_ptr(self.ptr.add(0x0834usize) as _) }
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}
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#[doc = "Device IN endpoint control register"]
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#[inline(always)]
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pub const fn diepctl(self, n: usize) -> Reg<regs::Diepctl, RW> {
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pub fn diepctl(self, n: usize) -> Reg<regs::Diepctl, RW> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0900usize + n * 32usize) as _) }
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}
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#[doc = "Device IN endpoint interrupt register"]
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#[inline(always)]
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pub const fn diepint(self, n: usize) -> Reg<regs::Diepint, RW> {
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pub fn diepint(self, n: usize) -> Reg<regs::Diepint, RW> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0908usize + n * 32usize) as _) }
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}
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#[doc = "Device IN endpoint transfer size register"]
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#[inline(always)]
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pub const fn dieptsiz(self, n: usize) -> Reg<regs::Dieptsiz, RW> {
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pub fn dieptsiz(self, n: usize) -> Reg<regs::Dieptsiz, RW> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0910usize + n * 32usize) as _) }
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}
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#[doc = "Device IN endpoint transmit FIFO status register"]
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#[inline(always)]
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pub const fn dtxfsts(self, n: usize) -> Reg<regs::Dtxfsts, R> {
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pub fn dtxfsts(self, n: usize) -> Reg<regs::Dtxfsts, R> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0918usize + n * 32usize) as _) }
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}
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#[doc = "Device OUT endpoint control register"]
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#[inline(always)]
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pub const fn doepctl(self, n: usize) -> Reg<regs::Doepctl, RW> {
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pub fn doepctl(self, n: usize) -> Reg<regs::Doepctl, RW> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0b00usize + n * 32usize) as _) }
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}
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#[doc = "Device OUT endpoint interrupt register"]
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#[inline(always)]
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pub const fn doepint(self, n: usize) -> Reg<regs::Doepint, RW> {
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pub fn doepint(self, n: usize) -> Reg<regs::Doepint, RW> {
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assert!(n < 16usize);
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unsafe { Reg::from_ptr(self.ptr.add(0x0b08usize + n * 32usize) as _) }
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}
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#[doc = "Device OUT endpoint transfer size register"]
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#[inline(always)]
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pub const fn doeptsiz(self, n: usize) -> Reg<regs::Doeptsiz, RW> {
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pub fn doeptsiz(self, n: usize) -> Reg<regs::Doeptsiz, RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { Reg::from_ptr(self.ptr.add(0x0b10usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Device OUT/IN endpoint DMA address register"]
|
||||
#[inline(always)]
|
||||
pub const fn doepdma(self, n: usize) -> Reg<u32, RW> {
|
||||
pub fn doepdma(self, n: usize) -> Reg<u32, RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { Reg::from_ptr(self.ptr.add(0x0b14usize + n * 32usize) as _) }
|
||||
}
|
||||
#[doc = "Power and clock gating control register"]
|
||||
#[inline(always)]
|
||||
pub const fn pcgcctl(self) -> Reg<regs::Pcgcctl, RW> {
|
||||
pub fn pcgcctl(self) -> Reg<regs::Pcgcctl, RW> {
|
||||
unsafe { Reg::from_ptr(self.ptr.add(0x0e00usize) as _) }
|
||||
}
|
||||
#[doc = "Device endpoint / host channel FIFO register"]
|
||||
#[inline(always)]
|
||||
pub const fn fifo(self, n: usize) -> Reg<regs::Fifo, RW> {
|
||||
pub fn fifo(self, n: usize) -> Reg<regs::Fifo, RW> {
|
||||
assert!(n < 16usize);
|
||||
unsafe { Reg::from_ptr(self.ptr.add(0x1000usize + n * 4096usize) as _) }
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user