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https://github.com/embassy-rs/embassy.git
synced 2024-11-22 06:42:32 +00:00
[UCPD] Add support for non-SOP packets
Allow capturing (and distinguishing) non-SOP packets as well. The default configuration will just configure SOP packets. For ease of use the default receive function signature is unchanged as for PD sinks (which is likely the common usage) just SOP is enough so no need to differentiate.
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@ -27,7 +27,7 @@ use crate::dma::{ChannelAndRequest, TransferOptions};
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use crate::interrupt;
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use crate::interrupt;
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use crate::interrupt::typelevel::Interrupt;
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use crate::interrupt::typelevel::Interrupt;
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use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
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use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
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pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState};
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pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, Rxordset, TypecVstateCc as CcVState};
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use crate::rcc::{self, RccPeripheral};
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use crate::rcc::{self, RccPeripheral};
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pub(crate) fn init(
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pub(crate) fn init(
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@ -86,6 +86,34 @@ pub enum CcPull {
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Source3_0A,
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Source3_0A,
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}
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}
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/// UCPD configuration
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#[non_exhaustive]
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#[derive(Copy, Clone, Debug)]
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pub struct Config {
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/// Receive SOP packets
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pub sop: bool,
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/// Receive SOP' packets
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pub sop_prime: bool,
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/// Receive SOP'' packets
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pub sop_double_prime: bool,
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/// Receive SOP'_Debug packets
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pub sop_prime_debug: bool,
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/// Receive SOP''_Debug packets
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pub sop_double_prime_debug: bool,
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}
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impl Default for Config {
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fn default() -> Self {
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Self {
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sop: true,
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sop_prime: false,
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sop_double_prime: false,
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sop_prime_debug: false,
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sop_double_prime_debug: false,
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}
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}
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}
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/// UCPD driver.
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/// UCPD driver.
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pub struct Ucpd<'d, T: Instance> {
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pub struct Ucpd<'d, T: Instance> {
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cc_phy: CcPhy<'d, T>,
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cc_phy: CcPhy<'d, T>,
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@ -98,6 +126,7 @@ impl<'d, T: Instance> Ucpd<'d, T> {
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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cc1: impl Peripheral<P = impl Cc1Pin<T>> + 'd,
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cc1: impl Peripheral<P = impl Cc1Pin<T>> + 'd,
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cc2: impl Peripheral<P = impl Cc2Pin<T>> + 'd,
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cc2: impl Peripheral<P = impl Cc2Pin<T>> + 'd,
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config: Config,
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) -> Self {
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) -> Self {
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into_ref!(cc1, cc2);
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into_ref!(cc1, cc2);
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cc1.set_as_analog();
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cc1.set_as_analog();
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@ -129,9 +158,15 @@ impl<'d, T: Instance> Ucpd<'d, T> {
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// 1.75us * 17 = ~30us
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// 1.75us * 17 = ~30us
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w.set_ifrgap(17 - 1);
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w.set_ifrgap(17 - 1);
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// TODO: Currently only hard reset and SOP messages can be received.
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// UNDOCUMENTED: This register can only be written while UCPDEN=0 (found by testing).
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// UNDOCUMENTED: This register can only be written while UCPDEN=0 (found by testing).
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w.set_rxordseten(0b1001);
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let rxordset = (config.sop as u16) << 0
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| (config.sop_prime as u16) << 1
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| (config.sop_double_prime as u16) << 2
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// Hard reset
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| 0x1 << 3
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| (config.sop_prime_debug as u16) << 4
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| (config.sop_double_prime_debug as u16) << 5;
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w.set_rxordseten(rxordset);
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// Enable DMA
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// Enable DMA
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w.set_txdmaen(true);
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w.set_txdmaen(true);
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@ -288,6 +323,22 @@ impl<'d, T: Instance> CcPhy<'d, T> {
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}
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}
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}
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}
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/// Receive SOP.
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#[derive(Debug, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Sop {
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/// SOP
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Sop,
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/// SOP'
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SopPrime,
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/// SOP''
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SopDoublePrime,
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/// SOP'_Debug
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SopPrimeDebug,
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/// SOP''_Debug
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SopDoublePrimeDebug,
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}
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/// Receive Error.
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/// Receive Error.
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#[derive(Debug, Clone, Copy)]
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#[derive(Debug, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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@ -340,6 +391,13 @@ impl<'d, T: Instance> PdPhy<'d, T> {
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///
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///
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/// Returns the number of received bytes or an error.
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/// Returns the number of received bytes or an error.
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pub async fn receive(&mut self, buf: &mut [u8]) -> Result<usize, RxError> {
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pub async fn receive(&mut self, buf: &mut [u8]) -> Result<usize, RxError> {
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self.receive_with_sop(buf).await.map(|(_sop, size)| size)
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}
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/// Receives SOP and a PD message into the provided buffer.
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///
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/// Returns the start of packet type and number of received bytes or an error.
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pub async fn receive_with_sop(&mut self, buf: &mut [u8]) -> Result<(Sop, usize), RxError> {
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let r = T::REGS;
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let r = T::REGS;
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let dma = unsafe {
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let dma = unsafe {
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@ -388,7 +446,18 @@ impl<'d, T: Instance> PdPhy<'d, T> {
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}
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}
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}
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}
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Ok(r.rx_payszr().read().rxpaysz().into())
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let sop = match r.rx_ordsetr().read().rxordset() {
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Rxordset::SOP => Sop::Sop,
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Rxordset::SOPPRIME => Sop::SopPrime,
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Rxordset::SOPDOUBLEPRIME => Sop::SopDoublePrime,
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Rxordset::SOPPRIMEDEBUG => Sop::SopPrimeDebug,
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Rxordset::SOPDOUBLEPRIMEDEBUG => Sop::SopDoublePrimeDebug,
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Rxordset::CABLERESET => return Err(RxError::HardReset),
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// Extension headers are not supported
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_ => unreachable!(),
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};
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Ok((sop, r.rx_payszr().read().rxpaysz().into()))
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}
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}
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fn enable_rx_interrupt(enable: bool) {
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fn enable_rx_interrupt(enable: bool) {
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@ -55,7 +55,7 @@ async fn main(_spawner: Spawner) {
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info!("Hello World!");
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info!("Hello World!");
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let mut ucpd = Ucpd::new(p.UCPD1, Irqs {}, p.PB6, p.PB4);
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let mut ucpd = Ucpd::new(p.UCPD1, Irqs {}, p.PB6, p.PB4, Default::default());
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ucpd.cc_phy().set_pull(CcPull::Sink);
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ucpd.cc_phy().set_pull(CcPull::Sink);
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info!("Waiting for USB connection...");
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info!("Waiting for USB connection...");
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@ -106,8 +106,8 @@ async fn main(_spawner: Spawner) {
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info!("Hello World!");
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info!("Hello World!");
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// Wire between PD0 and PA8
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// Wire between PD0 and PA8
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let ucpd1 = Ucpd::new(p.UCPD1, Irqs {}, p.PA8, p.PB15);
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let ucpd1 = Ucpd::new(p.UCPD1, Irqs {}, p.PA8, p.PB15, Default::default());
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let ucpd2 = Ucpd::new(p.UCPD2, Irqs {}, p.PD0, p.PD2);
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let ucpd2 = Ucpd::new(p.UCPD2, Irqs {}, p.PD0, p.PD2, Default::default());
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join(
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join(
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source(ucpd1, p.DMA1_CH1, p.DMA1_CH2),
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source(ucpd1, p.DMA1_CH1, p.DMA1_CH2),
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