mirror of
https://github.com/embassy-rs/embassy.git
synced 2024-11-22 06:42:32 +00:00
Initial fill out of driver without IO considerations
This commit is contained in:
Karun
parent
45a2abc392
commit
0febc24de7
@ -1030,6 +1030,38 @@ fn main() {
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(("octospi", "NCS"), quote!(crate::ospi::NSSPin)),
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(("octospi", "CLK"), quote!(crate::ospi::SckPin)),
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(("octospi", "NCLK"), quote!(crate::ospi::NckPin)),
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(("tsc", "G1_IO1"), quote!(crate::ospi::G1IO1Pin)),
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(("tsc", "G1_IO2"), quote!(crate::ospi::G1IO2Pin)),
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(("tsc", "G1_IO3"), quote!(crate::ospi::G1IO3Pin)),
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(("tsc", "G1_IO4"), quote!(crate::ospi::G1IO4Pin)),
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(("tsc", "G2_IO1"), quote!(crate::ospi::G2IO1Pin)),
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(("tsc", "G2_IO2"), quote!(crate::ospi::G2IO2Pin)),
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(("tsc", "G2_IO3"), quote!(crate::ospi::G2IO3Pin)),
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(("tsc", "G2_IO4"), quote!(crate::ospi::G2IO4Pin)),
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(("tsc", "G3_IO1"), quote!(crate::ospi::G3IO1Pin)),
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(("tsc", "G3_IO2"), quote!(crate::ospi::G3IO2Pin)),
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(("tsc", "G3_IO3"), quote!(crate::ospi::G3IO3Pin)),
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(("tsc", "G3_IO4"), quote!(crate::ospi::G3IO4Pin)),
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(("tsc", "G4_IO1"), quote!(crate::ospi::G4IO1Pin)),
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(("tsc", "G4_IO2"), quote!(crate::ospi::G4IO2Pin)),
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(("tsc", "G4_IO3"), quote!(crate::ospi::G4IO3Pin)),
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(("tsc", "G4_IO4"), quote!(crate::ospi::G4IO4Pin)),
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(("tsc", "G5_IO1"), quote!(crate::ospi::G5IO1Pin)),
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(("tsc", "G5_IO2"), quote!(crate::ospi::G5IO2Pin)),
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(("tsc", "G5_IO3"), quote!(crate::ospi::G5IO3Pin)),
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(("tsc", "G5_IO4"), quote!(crate::ospi::G5IO4Pin)),
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(("tsc", "G6_IO1"), quote!(crate::ospi::G6IO1Pin)),
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(("tsc", "G6_IO2"), quote!(crate::ospi::G6IO2Pin)),
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(("tsc", "G6_IO3"), quote!(crate::ospi::G6IO3Pin)),
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(("tsc", "G6_IO4"), quote!(crate::ospi::G6IO4Pin)),
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(("tsc", "G7_IO1"), quote!(crate::ospi::G7IO1Pin)),
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(("tsc", "G7_IO2"), quote!(crate::ospi::G7IO2Pin)),
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(("tsc", "G7_IO3"), quote!(crate::ospi::G7IO3Pin)),
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(("tsc", "G7_IO4"), quote!(crate::ospi::G7IO4Pin)),
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(("tsc", "G8_IO1"), quote!(crate::ospi::G8IO1Pin)),
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(("tsc", "G8_IO2"), quote!(crate::ospi::G8IO2Pin)),
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(("tsc", "G8_IO3"), quote!(crate::ospi::G8IO3Pin)),
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(("tsc", "G8_IO4"), quote!(crate::ospi::G8IO4Pin)),
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].into();
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for p in METADATA.peripherals {
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@ -103,6 +103,8 @@ pub mod sdmmc;
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pub mod spi;
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#[cfg(ucpd)]
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pub mod ucpd;
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#[cfg(tsc)]
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pub mod tsc;
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#[cfg(uid)]
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pub mod uid;
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#[cfg(usart)]
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100
embassy-stm32/src/tsc/enums.rs
Normal file
100
embassy-stm32/src/tsc/enums.rs
Normal file
@ -0,0 +1,100 @@
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/// Charge transfer pulse cycles
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum ChargeTransferPulseCycle {
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_1,
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_2,
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_3,
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_4,
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_5,
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_6,
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_7,
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_8,
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_9,
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_10,
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_11,
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_12,
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_13,
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_14,
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_15,
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_16,
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}
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impl Into<u8> for ChargeTransferPulseCycle {
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fn into(self) -> u8 {
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match self {
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ChargeTransferPulseCycle::_1 => 0,
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ChargeTransferPulseCycle::_2 => 1,
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ChargeTransferPulseCycle::_3 => 2,
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ChargeTransferPulseCycle::_4 => 3,
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ChargeTransferPulseCycle::_5 => 4,
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ChargeTransferPulseCycle::_6 => 5,
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ChargeTransferPulseCycle::_7 => 6,
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ChargeTransferPulseCycle::_8 => 7,
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ChargeTransferPulseCycle::_9 => 8,
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ChargeTransferPulseCycle::_10 => 9,
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ChargeTransferPulseCycle::_11 => 10,
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ChargeTransferPulseCycle::_12 => 11,
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ChargeTransferPulseCycle::_13 => 12,
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ChargeTransferPulseCycle::_14 => 13,
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ChargeTransferPulseCycle::_15 => 14,
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ChargeTransferPulseCycle::_16 => 15,
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}
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}
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}
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/// Prescaler divider
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum PGPrescalerDivider {
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_1,
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_2,
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_4,
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_8,
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_16,
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_32,
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_64,
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_128,
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}
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impl Into<u8> for PGPrescalerDivider {
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fn into(self) -> u8 {
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match self {
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PGPrescalerDivider::_1 => 0,
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PGPrescalerDivider::_2 => 1,
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PGPrescalerDivider::_4 => 2,
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PGPrescalerDivider::_8 => 3,
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PGPrescalerDivider::_16 => 4,
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PGPrescalerDivider::_32 => 5,
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PGPrescalerDivider::_64 => 6,
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PGPrescalerDivider::_128 => 7,
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}
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}
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}
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/// Max count
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#[allow(missing_docs)]
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#[derive(Copy, Clone)]
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pub enum MaxCount {
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_255,
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_511,
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_1023,
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_2047,
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_4095,
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_8191,
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_16383,
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}
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impl Into<u8> for MaxCount {
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fn into(self) -> u8 {
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match self {
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MaxCount::_255 => 0,
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MaxCount::_511 => 1,
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MaxCount::_1023 => 2,
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MaxCount::_2047 => 3,
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MaxCount::_4095 => 4,
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MaxCount::_8191 => 5,
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MaxCount::_16383 => 6,
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}
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}
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}
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357
embassy-stm32/src/tsc/mod.rs
Normal file
357
embassy-stm32/src/tsc/mod.rs
Normal file
@ -0,0 +1,357 @@
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//! TSC Peripheral Interface
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#![macro_use]
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pub mod enums;
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use crate::gpio::AnyPin;
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use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral};
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use crate::{peripherals, Peripheral};
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use embassy_hal_internal::{into_ref, PeripheralRef};
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pub use enums::*;
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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/// Test error for TSC
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Test,
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}
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pub enum PinType {
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Channel,
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Sample,
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Shield,
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}
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pub struct TscGroup {}
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pub enum State {
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Reset,
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Ready,
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Busy,
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Error,
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}
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pub enum GroupStatus {
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Ongoing,
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Complete,
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}
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pub enum Group {
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One,
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Two,
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Three,
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Four,
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Five,
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Six,
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Seven,
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Eight,
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}
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impl Into<usize> for Group {
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fn into(self) -> usize {
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match self {
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Group::One => 0,
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Group::Two => 1,
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Group::Three => 2,
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Group::Four => 3,
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Group::Five => 4,
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Group::Six => 5,
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Group::Seven => 6,
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Group::Eight => 7,
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}
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}
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}
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pub struct Config {
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pub ct_pulse_high_length: ChargeTransferPulseCycle,
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pub ct_pulse_low_length: ChargeTransferPulseCycle,
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pub spread_spectrum: bool,
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pub spread_spectrum_deviation: u8,
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pub spread_spectrum_prescaler: bool,
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pub pulse_generator_prescaler: PGPrescalerDivider,
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pub max_count_value: u8,
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pub io_default_mode: bool,
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pub synchro_pin_polarity: bool,
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pub acquisition_mode: bool,
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pub max_count_interrupt: bool,
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pub channel_ios: u32,
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pub shield_ios: u32,
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pub sampling_ios: u32,
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}
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pub struct TSC<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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state: State,
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config: Config,
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}
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impl<'d, T: Instance> TSC<'d, T> {
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pub fn new(peri: impl Peripheral<P = T> + 'd, config: Config) -> Self {
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into_ref!(peri);
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// Need to check valid pin configuration input
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// Need to configure pin
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Self::new_inner(peri, config)
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}
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fn new_inner(peri: impl Peripheral<P = T> + 'd, config: Config) -> Self {
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into_ref!(peri);
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T::enable_and_reset();
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T::REGS.cr().modify(|w| {
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w.set_tsce(true);
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w.set_ctph(config.ct_pulse_high_length.into());
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w.set_ctpl(config.ct_pulse_low_length.into());
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w.set_sse(config.spread_spectrum);
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w.set_ssd(config.spread_spectrum_deviation);
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w.set_sspsc(config.spread_spectrum_prescaler);
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w.set_pgpsc(config.pulse_generator_prescaler.into());
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w.set_mcv(config.max_count_value);
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w.set_syncpol(config.synchro_pin_polarity);
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w.set_am(config.acquisition_mode)
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});
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// Set IO configuration
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// Disable Schmitt trigger hysteresis on all used TSC IOs
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// T::REGS.iohcr().modify(|w| {
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// w.
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// });
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// Set channel and shield IOs
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// T::REGS.ioccr().modify(|w| {});
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// Set sampling IOs
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// T::REGS.ioscr().modify(|w| {
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// w.set_g1_io1(val)
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// });
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// Set the groups to be acquired
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// T::REGS.iogcsr().modify(|w| {
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// w.set_g1e(val);
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// });
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// Disable interrupts
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T::REGS.ier().modify(|w| {
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w.set_eoaie(false);
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w.set_mceie(false);
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});
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// Clear flags
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T::REGS.icr().modify(|w| {
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w.set_eoaic(true);
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w.set_mceic(true);
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});
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Self {
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_peri: peri,
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state: State::Ready,
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config,
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}
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}
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pub fn start(&mut self) {
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self.state = State::Busy;
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// Disable interrupts
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T::REGS.ier().modify(|w| {
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w.set_eoaie(false);
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w.set_mceie(false);
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});
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// Clear flags
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T::REGS.icr().modify(|w| {
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w.set_eoaic(true);
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w.set_mceic(true);
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});
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// Set the touch sensing IOs not acquired to the default mode
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T::REGS.cr().modify(|w| {
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w.set_iodef(self.config.io_default_mode);
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});
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// Start the acquisition
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T::REGS.cr().modify(|w| {
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w.set_start(true);
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});
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}
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pub fn start_it(&mut self) {
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self.state = State::Busy;
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// Enable interrupts
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T::REGS.ier().modify(|w| {
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w.set_eoaie(true);
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w.set_mceie(self.config.max_count_interrupt);
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});
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// Clear flags
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T::REGS.icr().modify(|w| {
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w.set_eoaic(true);
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w.set_mceic(true);
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});
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// Set the touch sensing IOs not acquired to the default mode
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T::REGS.cr().modify(|w| {
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w.set_iodef(self.config.io_default_mode);
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});
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// Start the acquisition
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T::REGS.cr().modify(|w| {
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w.set_start(true);
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});
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}
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pub fn stop(&mut self) {
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T::REGS.cr().modify(|w| {
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w.set_start(false);
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});
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// Set the touch sensing IOs in low power mode
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T::REGS.cr().modify(|w| {
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w.set_iodef(false);
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});
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// Clear flags
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T::REGS.icr().modify(|w| {
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w.set_eoaic(true);
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w.set_mceic(true);
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});
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self.state = State::Ready;
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}
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pub fn stop_it(&mut self) {
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T::REGS.cr().modify(|w| {
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w.set_start(false);
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});
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// Set the touch sensing IOs in low power mode
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T::REGS.cr().modify(|w| {
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w.set_iodef(false);
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});
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// Disable interrupts
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T::REGS.ier().modify(|w| {
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w.set_eoaie(false);
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w.set_mceie(false);
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});
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// Clear flags
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T::REGS.icr().modify(|w| {
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w.set_eoaic(true);
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w.set_mceic(true);
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});
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self.state = State::Ready;
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}
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pub fn poll_for_acquisition(&mut self) {
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while self.get_state() == State::Busy {}
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}
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pub fn get_state(&mut self) -> State {
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if self.state == State::Busy {
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if T::REGS.isr().read().eoaf() {
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if T::REGS.isr().read().mcef() {
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self.state = State::Error
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} else {
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self.state = State::Ready
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}
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}
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}
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self.state
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}
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|
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pub fn group_get_status(&mut self, index: Group) -> GroupStatus {
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// Status bits are set by hardware when the acquisition on the corresponding
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// enabled analog IO group is complete, cleared when new acquisition is started
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let status = match index {
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Group::One => T::REGS.iogcsr().read().g1s(),
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Group::Two => T::REGS.iogcsr().read().g2s(),
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Group::Three => T::REGS.iogcsr().read().g3s(),
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Group::Four => T::REGS.iogcsr().read().g4s(),
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Group::Five => T::REGS.iogcsr().read().g5s(),
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Group::Six => T::REGS.iogcsr().read().g6s(),
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Group::Seven => T::REGS.iogcsr().read().g7s(),
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Group::Eight => T::REGS.iogcsr().read().g8s(),
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};
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match status {
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true => GroupStatus::Complete,
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false => GroupStatus::Ongoing,
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}
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}
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pub fn group_get_value(&mut self, index: Group) -> u16 {
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T::REGS.iogcr(index.into()).read().cnt()
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}
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// pub fn configure_io()
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pub fn discharge_io(&mut self, status: bool) {
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// Set the touch sensing IOs in low power mode
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T::REGS.cr().modify(|w| {
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w.set_iodef(!status);
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});
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}
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}
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|
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impl<'d, T: Instance> Drop for TSC<'d, T> {
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fn drop(&mut self) {
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// Need to figure out what to do with the IOs
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T::disable();
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}
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}
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pub(crate) trait SealedInstance {
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const REGS: Regs;
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}
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/// TSC instance trait
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#[allow(private_bounds)]
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pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral {}
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foreach_peripheral!(
|
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(tsc, $inst:ident) => {
|
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impl SealedInstance for peripherals::$inst {
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const REGS: Regs = crate::pac::$inst;
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}
|
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|
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impl Instance for peripherals::$inst {}
|
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};
|
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);
|
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|
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pin_trait!(G1IO1Pin, Instance);
|
||||
pin_trait!(G1IO2Pin, Instance);
|
||||
pin_trait!(G1IO3Pin, Instance);
|
||||
pin_trait!(G1IO4Pin, Instance);
|
||||
pin_trait!(G2IO1Pin, Instance);
|
||||
pin_trait!(G2IO2Pin, Instance);
|
||||
pin_trait!(G2IO3Pin, Instance);
|
||||
pin_trait!(G2IO4Pin, Instance);
|
||||
pin_trait!(G3IO1Pin, Instance);
|
||||
pin_trait!(G3IO2Pin, Instance);
|
||||
pin_trait!(G3IO3Pin, Instance);
|
||||
pin_trait!(G3IO4Pin, Instance);
|
||||
pin_trait!(G4IO1Pin, Instance);
|
||||
pin_trait!(G4IO2Pin, Instance);
|
||||
pin_trait!(G4IO3Pin, Instance);
|
||||
pin_trait!(G4IO4Pin, Instance);
|
||||
pin_trait!(G5IO1Pin, Instance);
|
||||
pin_trait!(G5IO2Pin, Instance);
|
||||
pin_trait!(G5IO3Pin, Instance);
|
||||
pin_trait!(G5IO4Pin, Instance);
|
||||
pin_trait!(G6IO1Pin, Instance);
|
||||
pin_trait!(G6IO2Pin, Instance);
|
||||
pin_trait!(G6IO3Pin, Instance);
|
||||
pin_trait!(G6IO4Pin, Instance);
|
||||
pin_trait!(G7IO1Pin, Instance);
|
||||
pin_trait!(G7IO2Pin, Instance);
|
||||
pin_trait!(G7IO3Pin, Instance);
|
||||
pin_trait!(G7IO4Pin, Instance);
|
||||
pin_trait!(G8IO1Pin, Instance);
|
||||
pin_trait!(G8IO2Pin, Instance);
|
||||
pin_trait!(G8IO3Pin, Instance);
|
||||
pin_trait!(G8IO4Pin, Instance);
|
||||
Loading…
Reference in New Issue
Block a user