mirror of
https://github.com/embassy-rs/embassy.git
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Functional touch sensing
This commit is contained in:
parent
3cd6232d43
commit
0f8b3b8c65
@ -48,14 +48,25 @@ pub enum TscIOPin {
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impl BitOr<TscIOPin> for u32 {
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impl BitOr<TscIOPin> for u32 {
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type Output = u32;
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type Output = u32;
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fn bitor(self, rhs: TscIOPin) -> Self::Output {
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fn bitor(self, rhs: TscIOPin) -> Self::Output {
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self | rhs as u32
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let rhs: u32 = rhs.into();
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self | rhs
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}
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}
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impl BitOr<u32> for TscIOPin {
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type Output = u32;
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fn bitor(self, rhs: u32) -> Self::Output {
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let val: u32 = self.into();
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val | rhs
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}
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}
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}
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}
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impl BitOr for TscIOPin {
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impl BitOr for TscIOPin {
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type Output = u32;
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type Output = u32;
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fn bitor(self, rhs: Self) -> Self::Output {
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fn bitor(self, rhs: Self) -> Self::Output {
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self as u32 | rhs as u32
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let val: u32 = self.into();
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let rhs: u32 = rhs.into();
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val | rhs
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}
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}
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}
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}
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@ -5,10 +5,12 @@
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/// Enums defined for peripheral parameters
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/// Enums defined for peripheral parameters
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pub mod enums;
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pub mod enums;
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use core::marker::PhantomData;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_hal_internal::{into_ref, PeripheralRef};
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pub use enums::*;
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pub use enums::*;
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use crate::gpio::{AFType, AnyPin, Pull};
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use crate::gpio::{AFType, AnyPin};
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use crate::pac::tsc::Tsc as Regs;
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use crate::pac::tsc::Tsc as Regs;
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use crate::rcc::RccPeripheral;
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use crate::rcc::RccPeripheral;
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use crate::{peripherals, Peripheral};
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use crate::{peripherals, Peripheral};
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@ -38,9 +40,6 @@ pub enum PinType {
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Shield,
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Shield,
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}
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}
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/// Unclear
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pub struct TscGroup {}
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/// Peripheral state
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/// Peripheral state
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#[derive(PartialEq, Clone, Copy)]
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#[derive(PartialEq, Clone, Copy)]
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pub enum State {
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pub enum State {
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@ -58,6 +57,7 @@ pub enum State {
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/// For groups with multiple channel pins, may take longer because acquisitions
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/// For groups with multiple channel pins, may take longer because acquisitions
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/// are done sequentially. Check this status before pulling count for each
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/// are done sequentially. Check this status before pulling count for each
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/// sampled channel
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/// sampled channel
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#[derive(PartialEq)]
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pub enum GroupStatus {
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pub enum GroupStatus {
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/// Acquisition for channel still in progress
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/// Acquisition for channel still in progress
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Ongoing,
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Ongoing,
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@ -136,7 +136,7 @@ impl Default for Config {
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ct_pulse_high_length: ChargeTransferPulseCycle::_1,
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ct_pulse_high_length: ChargeTransferPulseCycle::_1,
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ct_pulse_low_length: ChargeTransferPulseCycle::_1,
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ct_pulse_low_length: ChargeTransferPulseCycle::_1,
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spread_spectrum: false,
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spread_spectrum: false,
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spread_spectrum_deviation: SSDeviation::new(0).unwrap(),
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spread_spectrum_deviation: SSDeviation::new(1).unwrap(),
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spread_spectrum_prescaler: false,
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spread_spectrum_prescaler: false,
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pulse_generator_prescaler: PGPrescalerDivider::_1,
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pulse_generator_prescaler: PGPrescalerDivider::_1,
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max_count_value: MaxCount::_255,
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max_count_value: MaxCount::_255,
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@ -153,43 +153,165 @@ impl Default for Config {
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/// Pin struct that maintains usage
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/// Pin struct that maintains usage
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#[allow(missing_docs)]
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#[allow(missing_docs)]
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#[allow(dead_code)]
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pub struct TscPin<'d, T, C> {
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pub struct TscPin<'d, T> {
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_pin: PeripheralRef<'d, AnyPin>,
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pin: PeripheralRef<'d, T>,
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_role: PinType,
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role: PinType,
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phantom: PhantomData<(T, C)>,
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}
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/// Input structure for constructor containing peripherals
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#[allow(missing_docs)]
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pub struct PeriPin<T> {
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pub pin: T,
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pub role: PinType,
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}
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}
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/// Pin group definition
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/// Pin group definition
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/// Pins are organized into groups of four IOs, all groups with a
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/// Pins are organized into groups of four IOs, all groups with a
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/// sampling channel must also have a sampling capacitor channel.
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/// sampling channel must also have a sampling capacitor channel.
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#[allow(missing_docs)]
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#[allow(missing_docs)]
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pub struct PinGroup<'d, A> {
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#[derive(Default)]
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pub d1: Option<TscPin<'d, A>>,
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pub struct PinGroup<'d, T, C> {
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pub d2: Option<TscPin<'d, A>>,
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d1: Option<TscPin<'d, T, C>>,
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pub d3: Option<TscPin<'d, A>>,
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d2: Option<TscPin<'d, T, C>>,
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pub d4: Option<TscPin<'d, A>>,
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d3: Option<TscPin<'d, T, C>>,
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d4: Option<TscPin<'d, T, C>>,
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}
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}
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impl<'d, T: Instance, C> PinGroup<'d, T, C> {
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/// Create new sensing group
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pub fn new() -> Self {
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Self {
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d1: None,
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d2: None,
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d3: None,
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d4: None,
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}
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}
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}
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macro_rules! group_impl {
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($group:ident, $trait1:ident, $trait2:ident, $trait3:ident, $trait4:ident) => {
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impl<'d, T: Instance> PinGroup<'d, T, $group> {
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#[doc = concat!("Create a new pin1 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io1(&mut self, pin: impl Peripheral<P = impl $trait1<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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match role {
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PinType::Channel => AFType::OutputPushPull,
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PinType::Sample => AFType::OutputOpenDrain,
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PinType::Shield => AFType::OutputPushPull,
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},
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);
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self.d1 = Some(TscPin {
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_pin: pin.map_into(),
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_role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin2 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io2(&mut self, pin: impl Peripheral<P = impl $trait2<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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match role {
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PinType::Channel => AFType::OutputPushPull,
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PinType::Sample => AFType::OutputOpenDrain,
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PinType::Shield => AFType::OutputPushPull,
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},
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);
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self.d2 = Some(TscPin {
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_pin: pin.map_into(),
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_role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin3 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io3(&mut self, pin: impl Peripheral<P = impl $trait3<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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match role {
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PinType::Channel => AFType::OutputPushPull,
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PinType::Sample => AFType::OutputOpenDrain,
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PinType::Shield => AFType::OutputPushPull,
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},
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);
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self.d3 = Some(TscPin {
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_pin: pin.map_into(),
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_role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin4 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io4(&mut self, pin: impl Peripheral<P = impl $trait4<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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match role {
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PinType::Channel => AFType::OutputPushPull,
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PinType::Sample => AFType::OutputOpenDrain,
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PinType::Shield => AFType::OutputPushPull,
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},
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);
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self.d4 = Some(TscPin {
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_pin: pin.map_into(),
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_role: role,
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phantom: PhantomData,
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})
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})
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}
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}
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};
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}
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group_impl!(G1, G1IO1Pin, G1IO2Pin, G1IO3Pin, G1IO4Pin);
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group_impl!(G2, G2IO1Pin, G2IO2Pin, G2IO3Pin, G2IO4Pin);
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group_impl!(G3, G3IO1Pin, G3IO2Pin, G3IO3Pin, G3IO4Pin);
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group_impl!(G4, G4IO1Pin, G4IO2Pin, G4IO3Pin, G4IO4Pin);
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group_impl!(G5, G5IO1Pin, G5IO2Pin, G5IO3Pin, G5IO4Pin);
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group_impl!(G6, G6IO1Pin, G6IO2Pin, G6IO3Pin, G6IO4Pin);
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group_impl!(G7, G7IO1Pin, G7IO2Pin, G7IO3Pin, G7IO4Pin);
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group_impl!(G8, G8IO1Pin, G8IO2Pin, G8IO3Pin, G8IO4Pin);
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/// Group 1 marker type.
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pub enum G1 {}
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/// Group 2 marker type.
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pub enum G2 {}
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/// Group 3 marker type.
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pub enum G3 {}
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/// Group 4 marker type.
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pub enum G4 {}
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/// Group 5 marker type.
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pub enum G5 {}
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/// Group 6 marker type.
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pub enum G6 {}
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/// Group 7 marker type.
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pub enum G7 {}
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/// Group 8 marker type.
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pub enum G8 {}
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/// TSC driver
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/// TSC driver
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pub struct Tsc<'d, T: Instance> {
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pub struct Tsc<'d, T: Instance> {
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_peri: PeripheralRef<'d, T>,
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_peri: PeripheralRef<'d, T>,
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_g1: Option<PinGroup<'d, AnyPin>>,
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_g1: Option<PinGroup<'d, T, G1>>,
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_g2: Option<PinGroup<'d, AnyPin>>,
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_g2: Option<PinGroup<'d, T, G2>>,
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_g3: Option<PinGroup<'d, AnyPin>>,
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_g3: Option<PinGroup<'d, T, G3>>,
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_g4: Option<PinGroup<'d, AnyPin>>,
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_g4: Option<PinGroup<'d, T, G4>>,
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_g5: Option<PinGroup<'d, AnyPin>>,
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_g5: Option<PinGroup<'d, T, G5>>,
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_g6: Option<PinGroup<'d, AnyPin>>,
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_g6: Option<PinGroup<'d, T, G6>>,
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#[cfg(any(tsc_v2, tsc_v3))]
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#[cfg(any(tsc_v2, tsc_v3))]
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_g7: Option<PinGroup<'d, AnyPin>>,
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_g7: Option<PinGroup<'d, T, G7>>,
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#[cfg(tsc_v3)]
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#[cfg(tsc_v3)]
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_g8: Option<PinGroup<'d, AnyPin>>,
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_g8: Option<PinGroup<'d, T, G8>>,
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state: State,
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state: State,
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config: Config,
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config: Config,
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}
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}
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@ -198,156 +320,33 @@ impl<'d, T: Instance> Tsc<'d, T> {
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/// Create new TSC driver
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/// Create new TSC driver
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pub fn new(
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pub fn new(
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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// g1_d1: Option<PeriPin<impl Peripheral<P = impl G1IO1Pin<T>> + 'd>>,
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g1: Option<PinGroup<'d, T, G1>>,
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g1_d2: Option<PeriPin<impl Peripheral<P = impl G1IO2Pin<T>> + 'd>>,
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g2: Option<PinGroup<'d, T, G2>>,
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g1_d3: Option<PeriPin<impl Peripheral<P = impl G1IO3Pin<T>> + 'd>>,
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g3: Option<PinGroup<'d, T, G3>>,
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// g1_d4: Option<PeriPin<impl Peripheral<P = impl G1IO4Pin<T>> + 'd>>,
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g4: Option<PinGroup<'d, T, G4>>,
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g5: Option<PinGroup<'d, T, G5>>,
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// g2_d1: Option<impl Peripheral<P = impl G2IO1Pin<T>> + 'd>,
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g6: Option<PinGroup<'d, T, G6>>,
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// g2_d2: Option<impl Peripheral<P = impl G2IO2Pin<T>> + 'd>,
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#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, T, G7>>,
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g2_d3: Option<PeriPin<impl Peripheral<P = impl G2IO3Pin<T>> + 'd>>,
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#[cfg(tsc_v3)] g8: Option<PinGroup<'d, T, G8>>,
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g2_d4: Option<PeriPin<impl Peripheral<P = impl G2IO4Pin<T>> + 'd>>,
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// g3_d1: Option<impl Peripheral<P = impl G3IO1Pin<T>> + 'd>,
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// g3_d2: Option<impl Peripheral<P = impl G3IO2Pin<T>> + 'd>,
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// g3_d3: Option<impl Peripheral<P = impl G3IO3Pin<T>> + 'd>,
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// g3_d4: Option<impl Peripheral<P = impl G3IO4Pin<T>> + 'd>,
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g4_d1: Option<PeriPin<impl Peripheral<P = impl G4IO1Pin<T>> + 'd>>,
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g4_d2: Option<PeriPin<impl Peripheral<P = impl G4IO2Pin<T>> + 'd>>,
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// g4_d3: Option<impl Peripheral<P = impl G4IO3Pin<T>> + 'd>,
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// g4_d4: Option<impl Peripheral<P = impl G4IO4Pin<T>> + 'd>,
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// g5_d1: Option<impl Peripheral<P = impl G5IO1Pin<T>> + 'd>,
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// g5_d2: Option<impl Peripheral<P = impl G5IO2Pin<T>> + 'd>,
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// g5_d3: Option<impl Peripheral<P = impl G5IO3Pin<T>> + 'd>,
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// g5_d4: Option<impl Peripheral<P = impl G5IO4Pin<T>> + 'd>,
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// g6_d1: Option<impl Peripheral<P = impl G6IO1Pin<T>> + 'd>,
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// g6_d2: Option<impl Peripheral<P = impl G6IO2Pin<T>> + 'd>,
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// g6_d3: Option<impl Peripheral<P = impl G6IO3Pin<T>> + 'd>,
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// g6_d4: Option<impl Peripheral<P = impl G6IO4Pin<T>> + 'd>,
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// g7_d1: Option<impl Peripheral<P = impl G7IO1Pin<T>> + 'd>,
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// g7_d2: Option<impl Peripheral<P = impl G7IO2Pin<T>> + 'd>,
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// g7_d3: Option<impl Peripheral<P = impl G7IO3Pin<T>> + 'd>,
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// g7_d4: Option<impl Peripheral<P = impl G7IO4Pin<T>> + 'd>,
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// g8_d1: Option<impl Peripheral<P = impl G8IO1Pin<T>> + 'd>,
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// g8_d2: Option<impl Peripheral<P = impl G8IO2Pin<T>> + 'd>,
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// g8_d3: Option<impl Peripheral<P = impl G8IO3Pin<T>> + 'd>,
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// g8_d4: Option<impl Peripheral<P = impl G8IO4Pin<T>> + 'd>,
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config: Config,
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config: Config,
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) -> Self {
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) -> Self {
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let g1_d2 = g1_d2.unwrap();
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let g1_d2_pin = g1_d2.pin;
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let g1_d3 = g1_d3.unwrap();
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let g1_d3_pin = g1_d3.pin;
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let g2_d3 = g2_d3.unwrap();
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let g2_d3_pin = g2_d3.pin;
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let g2_d4 = g2_d4.unwrap();
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let g2_d4_pin = g2_d4.pin;
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let g4_d1 = g4_d1.unwrap();
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let g4_d1_pin = g4_d1.pin;
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|
||||||
let g4_d2 = g4_d2.unwrap();
|
|
||||||
let g4_d2_pin = g4_d2.pin;
|
|
||||||
into_ref!(peri, g1_d2_pin, g1_d3_pin, g2_d3_pin, g2_d4_pin, g4_d1_pin, g4_d2_pin);
|
|
||||||
|
|
||||||
// Configure pins
|
|
||||||
match g1_d2.role {
|
|
||||||
PinType::Channel => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g1_d2_pin.set_as_af_pull(g1_d2_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
match g1_d3.role {
|
|
||||||
PinType::Channel => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g1_d3_pin.set_as_af_pull(g1_d3_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
let g1 = PinGroup {
|
|
||||||
d1: None,
|
|
||||||
d2: Some(TscPin {
|
|
||||||
pin: g1_d2_pin.map_into(),
|
|
||||||
role: g1_d2.role,
|
|
||||||
}),
|
|
||||||
d3: Some(TscPin {
|
|
||||||
pin: g1_d3_pin.map_into(),
|
|
||||||
role: g1_d3.role,
|
|
||||||
}),
|
|
||||||
d4: None,
|
|
||||||
};
|
|
||||||
|
|
||||||
match g2_d3.role {
|
|
||||||
PinType::Channel => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g2_d3_pin.set_as_af_pull(g2_d3_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
match g2_d4.role {
|
|
||||||
PinType::Channel => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g2_d4_pin.set_as_af_pull(g2_d4_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
let g2 = PinGroup {
|
|
||||||
d1: None,
|
|
||||||
d2: None,
|
|
||||||
d3: Some(TscPin {
|
|
||||||
pin: g2_d3_pin.map_into(),
|
|
||||||
role: g2_d3.role,
|
|
||||||
}),
|
|
||||||
d4: Some(TscPin {
|
|
||||||
pin: g2_d4_pin.map_into(),
|
|
||||||
role: g2_d4.role,
|
|
||||||
}),
|
|
||||||
};
|
|
||||||
|
|
||||||
match g4_d1.role {
|
|
||||||
PinType::Channel => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g4_d1_pin.set_as_af_pull(g4_d1_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
match g4_d2.role {
|
|
||||||
PinType::Channel => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
PinType::Sample => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputOpenDrain, Pull::None),
|
|
||||||
PinType::Shield => g4_d2_pin.set_as_af_pull(g4_d2_pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
}
|
|
||||||
let g4 = PinGroup {
|
|
||||||
d1: Some(TscPin {
|
|
||||||
pin: g4_d1_pin.map_into(),
|
|
||||||
role: g4_d1.role,
|
|
||||||
}),
|
|
||||||
d2: Some(TscPin {
|
|
||||||
pin: g4_d2_pin.map_into(),
|
|
||||||
role: g4_d2.role,
|
|
||||||
}),
|
|
||||||
d3: None,
|
|
||||||
d4: None,
|
|
||||||
};
|
|
||||||
|
|
||||||
// Need to check valid pin configuration input
|
// Need to check valid pin configuration input
|
||||||
Self::new_inner(
|
Self::new_inner(
|
||||||
peri,
|
peri,
|
||||||
Some(g1),
|
g1,
|
||||||
Some(g2),
|
g2,
|
||||||
None,
|
g3,
|
||||||
Some(g4),
|
g4,
|
||||||
None,
|
g5,
|
||||||
None,
|
g6,
|
||||||
#[cfg(any(tsc_v2, tsc_v3))]
|
#[cfg(any(tsc_v2, tsc_v3))]
|
||||||
None,
|
g7,
|
||||||
#[cfg(tsc_v3)]
|
#[cfg(tsc_v3)]
|
||||||
None,
|
g8,
|
||||||
config,
|
config,
|
||||||
)
|
)
|
||||||
}
|
}
|
||||||
|
|
||||||
// fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) {
|
|
||||||
// match role {
|
|
||||||
// PinType::Channel => pin.set_as_af_pull(pin.af_num(), AFType::OutputPushPull, Pull::None),
|
|
||||||
// PinType::Sample => {}
|
|
||||||
// PinType::Shield => {}
|
|
||||||
// }
|
|
||||||
// }
|
|
||||||
|
|
||||||
// fn filter_group() -> Option<PinGroup<'d>> {}
|
|
||||||
fn extract_groups(io_mask: u32) -> u32 {
|
fn extract_groups(io_mask: u32) -> u32 {
|
||||||
let mut groups: u32 = 0;
|
let mut groups: u32 = 0;
|
||||||
for idx in 0..TSC_NUM_GROUPS {
|
for idx in 0..TSC_NUM_GROUPS {
|
||||||
@ -360,14 +359,14 @@ impl<'d, T: Instance> Tsc<'d, T> {
|
|||||||
|
|
||||||
fn new_inner(
|
fn new_inner(
|
||||||
peri: impl Peripheral<P = T> + 'd,
|
peri: impl Peripheral<P = T> + 'd,
|
||||||
g1: Option<PinGroup<'d, AnyPin>>,
|
g1: Option<PinGroup<'d, T, G1>>,
|
||||||
g2: Option<PinGroup<'d, AnyPin>>,
|
g2: Option<PinGroup<'d, T, G2>>,
|
||||||
g3: Option<PinGroup<'d, AnyPin>>,
|
g3: Option<PinGroup<'d, T, G3>>,
|
||||||
g4: Option<PinGroup<'d, AnyPin>>,
|
g4: Option<PinGroup<'d, T, G4>>,
|
||||||
g5: Option<PinGroup<'d, AnyPin>>,
|
g5: Option<PinGroup<'d, T, G5>>,
|
||||||
g6: Option<PinGroup<'d, AnyPin>>,
|
g6: Option<PinGroup<'d, T, G6>>,
|
||||||
#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, AnyPin>>,
|
#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, T, G7>>,
|
||||||
#[cfg(tsc_v3)] g8: Option<PinGroup<'d, AnyPin>>,
|
#[cfg(tsc_v3)] g8: Option<PinGroup<'d, T, G8>>,
|
||||||
config: Config,
|
config: Config,
|
||||||
) -> Self {
|
) -> Self {
|
||||||
into_ref!(peri);
|
into_ref!(peri);
|
||||||
@ -404,7 +403,7 @@ impl<'d, T: Instance> Tsc<'d, T> {
|
|||||||
// Disable Schmitt trigger hysteresis on all used TSC IOs
|
// Disable Schmitt trigger hysteresis on all used TSC IOs
|
||||||
T::REGS
|
T::REGS
|
||||||
.iohcr()
|
.iohcr()
|
||||||
.write(|w| w.0 = config.channel_ios | config.shield_ios | config.sampling_ios);
|
.write(|w| w.0 = !(config.channel_ios | config.shield_ios | config.sampling_ios));
|
||||||
|
|
||||||
// Set channel and shield IOs
|
// Set channel and shield IOs
|
||||||
T::REGS.ioccr().write(|w| w.0 = config.channel_ios | config.shield_ios);
|
T::REGS.ioccr().write(|w| w.0 = config.channel_ios | config.shield_ios);
|
||||||
@ -592,8 +591,6 @@ impl<'d, T: Instance> Tsc<'d, T> {
|
|||||||
T::REGS.iogcr(index.into()).read().cnt()
|
T::REGS.iogcr(index.into()).read().cnt()
|
||||||
}
|
}
|
||||||
|
|
||||||
// pub fn configure_io()
|
|
||||||
|
|
||||||
/// Discharge the IOs for subsequent acquisition
|
/// Discharge the IOs for subsequent acquisition
|
||||||
pub fn discharge_io(&mut self, status: bool) {
|
pub fn discharge_io(&mut self, status: bool) {
|
||||||
// Set the touch sensing IOs in low power mode
|
// Set the touch sensing IOs in low power mode
|
||||||
@ -605,7 +602,6 @@ impl<'d, T: Instance> Tsc<'d, T> {
|
|||||||
|
|
||||||
impl<'d, T: Instance> Drop for Tsc<'d, T> {
|
impl<'d, T: Instance> Drop for Tsc<'d, T> {
|
||||||
fn drop(&mut self) {
|
fn drop(&mut self) {
|
||||||
// Need to figure out what to do with the IOs
|
|
||||||
T::disable();
|
T::disable();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user