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https://github.com/embassy-rs/embassy.git
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commit
0ced8400d0
@ -219,6 +219,74 @@ select_bootloader! {
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default => BOOT_LOADER_W25Q080
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}
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/// Installs a stack guard for the CORE0 stack in MPU region 0.
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/// Will fail if the MPU is already confgigured. This function requires
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/// a `_stack_end` symbol to be defined by the linker script, and expexcts
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/// `_stack_end` to be located at the lowest address (largest depth) of
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/// the stack.
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///
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/// This method can *only* set up stack guards on the currently
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/// executing core. Stack guards for CORE1 are set up automatically,
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/// only CORE0 should ever use this.
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///
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/// # Usage
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///
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/// ```no_run
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/// #![feature(type_alias_impl_trait)]
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/// use embassy_rp::install_core0_stack_guard;
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/// use embassy_executor::{Executor, Spawner};
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///
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/// #[embassy_executor::main]
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/// async fn main(_spawner: Spawner) {
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/// // set up by the linker as follows:
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/// //
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/// // MEMORY {
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/// // STACK0: ORIGIN = 0x20040000, LENGTH = 4K
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/// // }
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/// //
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/// // _stack_end = ORIGIN(STACK0);
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/// // _stack_start = _stack_end + LENGTH(STACK0);
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/// //
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/// install_core0_stack_guard().expect("MPU already configured");
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/// let p = embassy_rp::init(Default::default());
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///
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/// // ...
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/// }
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/// ```
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pub fn install_core0_stack_guard() -> Result<(), ()> {
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extern "C" {
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static mut _stack_end: usize;
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}
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unsafe { install_stack_guard(&mut _stack_end as *mut usize) }
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}
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#[inline(always)]
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fn install_stack_guard(stack_bottom: *mut usize) -> Result<(), ()> {
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let core = unsafe { cortex_m::Peripherals::steal() };
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// Fail if MPU is already configured
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if core.MPU.ctrl.read() != 0 {
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return Err(());
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}
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// The minimum we can protect is 32 bytes on a 32 byte boundary, so round up which will
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// just shorten the valid stack range a tad.
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let addr = (stack_bottom as u32 + 31) & !31;
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// Mask is 1 bit per 32 bytes of the 256 byte range... clear the bit for the segment we want
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let subregion_select = 0xff ^ (1 << ((addr >> 5) & 7));
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unsafe {
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core.MPU.ctrl.write(5); // enable mpu with background default map
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core.MPU.rbar.write((addr & !0xff) | (1 << 4)); // set address and update RNR
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core.MPU.rasr.write(
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1 // enable region
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| (0x7 << 1) // size 2^(7 + 1) = 256
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| (subregion_select << 8)
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| 0x10000000, // XN = disable instruction fetch; no other bits means no permissions
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);
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}
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Ok(())
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}
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pub mod config {
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use crate::clocks::ClockConfig;
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@ -52,41 +52,20 @@ use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
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use crate::interrupt::InterruptExt;
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use crate::peripherals::CORE1;
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use crate::{gpio, interrupt, pac};
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use crate::{gpio, install_stack_guard, interrupt, pac};
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const PAUSE_TOKEN: u32 = 0xDEADBEEF;
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const RESUME_TOKEN: u32 = !0xDEADBEEF;
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static IS_CORE1_INIT: AtomicBool = AtomicBool::new(false);
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#[inline(always)]
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fn install_stack_guard(stack_bottom: *mut usize) {
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let core = unsafe { cortex_m::Peripherals::steal() };
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// Trap if MPU is already configured
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if core.MPU.ctrl.read() != 0 {
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fn core1_setup(stack_bottom: *mut usize) {
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if let Err(_) = install_stack_guard(stack_bottom) {
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// currently only happens if the MPU was already set up, which
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// would indicate that the core is already in use from outside
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// embassy, somehow. trap if so since we can't deal with that.
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cortex_m::asm::udf();
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}
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// The minimum we can protect is 32 bytes on a 32 byte boundary, so round up which will
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// just shorten the valid stack range a tad.
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let addr = (stack_bottom as u32 + 31) & !31;
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// Mask is 1 bit per 32 bytes of the 256 byte range... clear the bit for the segment we want
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let subregion_select = 0xff ^ (1 << ((addr >> 5) & 7));
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unsafe {
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core.MPU.ctrl.write(5); // enable mpu with background default map
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core.MPU.rbar.write((addr & !0xff) | 0x8);
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core.MPU.rasr.write(
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1 // enable region
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| (0x7 << 1) // size 2^(7 + 1) = 256
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| (subregion_select << 8)
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| 0x10000000, // XN = disable instruction fetch; no other bits means no permissions
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);
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}
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}
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#[inline(always)]
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fn core1_setup(stack_bottom: *mut usize) {
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install_stack_guard(stack_bottom);
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unsafe {
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gpio::init();
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}
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