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DAC v2 basics.

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This commit is contained in:
Bob McWhirter 2021-05-28 13:31:40 -04:00
parent 2aa836b068
commit 0c54c1afd1
5 changed files with 344 additions and 1 deletions
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9
embassy-stm32/gen.py
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@ -145,6 +145,15 @@ with open(output_file, 'w') as f:
if re.match('EXTI', irq):
exti_interrupts.append(irq)
if block_mod == 'dac':
f.write(f'impl_dac!({name});')
if 'dac_out1' in peri:
pin = peri['dac_out1']
f.write(f'impl_dac_pin!({name}, 1, {pin});')
if 'dac_out2' in peri:
pin = peri['dac_out2']
f.write(f'impl_dac_pin!({name}, 2, {pin});')
if not custom_singletons:
singletons.append(name)

48
embassy-stm32/src/dac/mod.rs Normal file
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@ -0,0 +1,48 @@
#![macro_use]
#[cfg_attr(dac_v2, path = "v2.rs")]
mod _version;
use crate::gpio::NoPin;
pub use _version::*;
pub(crate) mod sealed {
use super::*;
use crate::gpio::{OptionalPin, Pin};
pub trait Instance {
fn regs() -> &'static crate::pac::dac::Dac;
}
pub trait DacPin<T: Instance, const C: u8>: OptionalPin {}
}
pub trait Instance: sealed::Instance + 'static {}
pub trait DacPin<T: Instance, const C: u8>: sealed::DacPin<T, C> + 'static {}
impl<T: Instance, const C: u8> DacPin<T, C> for NoPin {}
impl<T: Instance, const C: u8> sealed::DacPin<T, C> for NoPin {}
macro_rules! impl_dac {
($inst:ident) => {
impl crate::dac::sealed::Instance for peripherals::$inst {
fn regs() -> &'static crate::pac::dac::Dac {
&crate::pac::$inst
}
}
impl crate::dac::Instance for peripherals::$inst {}
};
}
macro_rules! impl_dac_pin {
($inst:ident, $channel:expr, $pin:ident ) => {
impl crate::dac::DacPin<peripherals::$inst, $channel> for peripherals::$pin {}
impl crate::dac::sealed::DacPin<peripherals::$inst, $channel> for peripherals::$pin {
//fn af_num(&self) -> u8 {
//$af
//}
}
};
}

284
embassy-stm32/src/dac/v2.rs Normal file
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@ -0,0 +1,284 @@
use crate::dac::{DacPin, Instance};
use crate::gpio::Pin;
use crate::gpio::{AnyPin, OptionalPin};
use crate::pac::dac;
use core::marker::PhantomData;
use embassy::util::Unborrow;
use embassy_extras::unborrow;
pub enum Error {
UnconfiguredChannel,
InvalidValue,
}
pub enum Channel {
Ch1,
Ch2,
}
pub enum Ch1Trigger {
Tim6,
Tim3,
Tim7,
Tim15,
Tim2,
Exti9,
Software,
}
impl Ch1Trigger {
fn tsel(&self) -> dac::vals::Tsel1 {
match self {
Ch1Trigger::Tim6 => dac::vals::Tsel1::TIM6_TRGO,
Ch1Trigger::Tim3 => dac::vals::Tsel1::TIM3_TRGO,
Ch1Trigger::Tim7 => dac::vals::Tsel1::TIM7_TRGO,
Ch1Trigger::Tim15 => dac::vals::Tsel1::TIM15_TRGO,
Ch1Trigger::Tim2 => dac::vals::Tsel1::TIM2_TRGO,
Ch1Trigger::Exti9 => dac::vals::Tsel1::EXTI9,
Ch1Trigger::Software => dac::vals::Tsel1::SOFTWARE,
}
}
}
pub enum Ch2Trigger {
Tim6,
Tim8,
Tim7,
Tim5,
Tim2,
Tim4,
Exti9,
Software,
}
impl Ch2Trigger {
fn tsel(&self) -> dac::vals::Tsel2 {
match self {
Ch2Trigger::Tim6 => dac::vals::Tsel2::TIM6_TRGO,
Ch2Trigger::Tim8 => dac::vals::Tsel2::TIM8_TRGO,
Ch2Trigger::Tim7 => dac::vals::Tsel2::TIM7_TRGO,
Ch2Trigger::Tim5 => dac::vals::Tsel2::TIM5_TRGO,
Ch2Trigger::Tim2 => dac::vals::Tsel2::TIM2_TRGO,
Ch2Trigger::Tim4 => dac::vals::Tsel2::TIM4_TRGO,
Ch2Trigger::Exti9 => dac::vals::Tsel2::EXTI9,
Ch2Trigger::Software => dac::vals::Tsel2::SOFTWARE,
}
}
}
pub enum Alignment {
Left,
Right,
}
pub enum Value {
Bit8(u8),
Bit12(u16, Alignment),
}
pub struct Dac<'d, T: Instance> {
//peri: T,
ch1: Option<AnyPin>,
ch2: Option<AnyPin>,
phantom: PhantomData<&'d mut T>,
}
impl<'d, T: Instance> Dac<'d, T> {
pub fn new(
peri: impl Unborrow<Target = T> + 'd,
ch1: impl Unborrow<Target = impl DacPin<T, 1>>,
ch2: impl Unborrow<Target = impl DacPin<T, 2>>,
) -> Self {
unborrow!(peri);
unborrow!(ch1, ch2);
let ch1 = ch1.degrade_optional();
if ch1.is_some() {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en1(true);
});
}
}
let ch2 = ch2.degrade_optional();
if ch2.is_some() {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en2(true);
});
}
}
let mut dac = Self {
ch1,
ch2,
phantom: PhantomData,
};
dac
}
pub fn enable_channel(&mut self, ch: Channel) -> Result<(), Error> {
match ch {
Channel::Ch1 => {
if self.ch1.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en1(true);
});
}
Ok(())
}
}
Channel::Ch2 => {
if self.ch2.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en2(true);
});
}
Ok(())
}
}
}
}
pub fn disable_channel(&mut self, ch: Channel) -> Result<(), Error> {
match ch {
Channel::Ch1 => {
if self.ch1.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en1(true);
});
}
Ok(())
}
}
Channel::Ch2 => {
if self.ch2.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().cr().modify(|reg| {
reg.set_en2(true);
});
}
Ok(())
}
}
}
}
pub fn select_trigger_ch1(&mut self, trigger: Ch1Trigger) -> Result<(), Error> {
if self.ch1.is_none() {
return Err(Error::UnconfiguredChannel);
}
self.disable_channel(Channel::Ch1);
unsafe {
T::regs().cr().modify(|reg| {
reg.set_tsel1(trigger.tsel());
})
}
Ok(())
}
pub fn select_trigger_ch2(&mut self, trigger: Ch2Trigger) -> Result<(), Error> {
if self.ch2.is_none() {
return Err(Error::UnconfiguredChannel);
}
self.disable_channel(Channel::Ch2);
unsafe {
T::regs().cr().modify(|reg| {
reg.set_tsel2(trigger.tsel());
})
}
Ok(())
}
pub fn trigger(&mut self, ch: Channel) -> Result<(), Error> {
match ch {
Channel::Ch1 => {
if self.ch1.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().swtrigr().write(|reg| {
reg.set_swtrig1(true);
});
}
Ok(())
}
}
Channel::Ch2 => {
if self.ch2.is_none() {
Err(Error::UnconfiguredChannel)
} else {
unsafe {
T::regs().swtrigr().write(|reg| {
reg.set_swtrig2(true);
});
}
Ok(())
}
}
}
}
pub fn trigger_all(&mut self) {
unsafe {
T::regs().swtrigr().write(|reg| {
reg.set_swtrig1(true);
reg.set_swtrig2(true);
})
}
}
pub fn set(&mut self, ch: Channel, value: Value) -> Result<(), Error> {
match ch {
Channel::Ch1 => {
if self.ch1.is_none() {
Err(Error::UnconfiguredChannel)
} else {
match value {
Value::Bit8(v) => unsafe {
T::regs().dhr8r1().write(|reg| reg.set_dacc1dhr(v));
},
Value::Bit12(v, Alignment::Left) => unsafe {
T::regs().dhr12l1().write(|reg| reg.set_dacc1dhr(v));
},
Value::Bit12(v, Alignment::Right) => unsafe {
T::regs().dhr12r1().write(|reg| reg.set_dacc1dhr(v));
},
}
Ok(())
}
}
Channel::Ch2 => {
if self.ch2.is_none() {
Err(Error::UnconfiguredChannel)
} else {
match value {
Value::Bit8(v) => unsafe {
T::regs().dhr8r2().write(|reg| reg.set_dacc2dhr(v));
},
Value::Bit12(v, Alignment::Left) => unsafe {
T::regs().dhr12l2().write(|reg| reg.set_dacc2dhr(v));
},
Value::Bit12(v, Alignment::Right) => unsafe {
T::regs().dhr12r2().write(|reg| reg.set_dacc2dhr(v));
},
}
Ok(())
}
}
}
}
}

2
embassy-stm32/src/lib.rs
View File

@ -23,6 +23,8 @@ pub mod rcc;
// Sometimes-present hardware
#[cfg(timer)]
pub mod clock;
#[cfg(dac)]
pub mod dac;
#[cfg(dma)]
pub mod dma;
#[cfg(i2c)]

2
stm32-data

@ -1 +1 @@
Subproject commit 64220ffdbf55b802f063ab209cdd7a788c95ca57
Subproject commit dfc67fe255e1e70101e9f1e3fb8b4fd8bb37362f