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Corrected hash CI build issues.

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This commit is contained in:
Caleb Garrett 2024-02-05 14:44:50 -05:00
parent 079bb7b490
commit 09973ad482
2 changed files with 3 additions and 3 deletions
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4
tests/stm32/src/bin/hash.rs
View File

@ -7,7 +7,7 @@ mod common;
use common::*;
use embassy_executor::Spawner;
use embassy_stm32::hash::*;
use embassy_stm32::{bind_interrupts, peripherals, hash};
use embassy_stm32::{bind_interrupts, hash, peripherals};
use sha2::{Digest, Sha224, Sha256};
use {defmt_rtt as _, panic_probe as _};
@ -39,7 +39,7 @@ async fn main(_spawner: Spawner) {
hw_hasher.update(&mut sha256context, test_2).await;
let mut sha_256_digest_buffer: [u8; 64] = [0; 64];
let sha256_digest = hw_hasher.finish(sha256context, &mut sha_256_digest_buffer).await;
// Compute the SHA-256 digest in software.
let mut sw_sha256_hasher = Sha256::new();
sw_sha256_hasher.update(test_1);

2
tests/stm32/src/common.rs
View File

@ -201,7 +201,7 @@ define_peris!(
);
#[cfg(feature = "stm32l552ze")]
define_peris!(
HASH_DMA = DMA1_CH0,
HASH_DMA = DMA1_CH1,
UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
@irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},