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Merge pull request #3451 from dvdsk/read_ready
stm32/uart impl ReadReady for RingbufferdUart
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commit
089b8a482e
@ -21,6 +21,10 @@ pub trait DmaCtrl {
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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Overrun,
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/// the newly read DMA positions don't make sense compared to the previous
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/// ones. This can usually only occur due to wrong Driver implementation, if
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/// the driver author (or the user using raw metapac code) directly resets
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/// the channel for instance.
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DmaUnsynced,
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}
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@ -5,6 +5,7 @@ use core::task::Poll;
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_internal::PeripheralRef;
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use embedded_io_async::ReadReady;
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use futures_util::future::{select, Either};
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use super::{clear_interrupt_flags, rdr, reconfigure, sr, Config, ConfigError, Error, Info, State, UartRx};
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@ -262,3 +263,20 @@ impl embedded_io_async::Read for RingBufferedUartRx<'_> {
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self.read(buf).await
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}
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}
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impl ReadReady for RingBufferedUartRx<'_> {
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fn read_ready(&mut self) -> Result<bool, Self::Error> {
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let len = self.ring_buf.len().map_err(|e| match e {
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crate::dma::ringbuffer::Error::Overrun => Self::Error::Overrun,
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crate::dma::ringbuffer::Error::DmaUnsynced => {
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error!(
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"Ringbuffer error: DmaUNsynced, driver implementation is
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probably bugged please open an issue"
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);
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// we report this as overrun since its recoverable in the same way
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Self::Error::Overrun
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}
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})?;
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Ok(len > 0)
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}
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}
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