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stm32: update metapac.

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This commit is contained in:
Dario Nieuwenhuis 2024-01-03 18:31:18 +01:00
parent 87ac51d656
commit 03ba4ae386
3 changed files with 6 additions and 5 deletions
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1
ci.sh
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@ -106,6 +106,7 @@ cargo batch \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb15cc,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32wb15cc,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l072cz,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l041f6,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l041f6,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l051k8,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l073cz,defmt,exti,time-driver-any,low-power,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32l073cz,defmt,exti,time-driver-any,low-power,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32l151cb-a,defmt,exti,time-driver-any,time \
--- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f303c8,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv7m-none-eabi --features stm32f303c8,defmt,exti,time-driver-any,time \

4
embassy-stm32/Cargo.toml
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@ -57,7 +57,7 @@ futures = { version = "0.3.17", default-features = false, features = ["async-awa
rand_core = "0.6.3" rand_core = "0.6.3"
sdio-host = "0.5.0" sdio-host = "0.5.0"
critical-section = "1.1" critical-section = "1.1"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9ec9e0afb8fac2f5500a885e1cfd9c03f3a2ee30" } stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790" }
vcell = "0.1.3" vcell = "0.1.3"
bxcan = "0.7.0" bxcan = "0.7.0"
nb = "1.0.0" nb = "1.0.0"
@ -75,7 +75,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies] [build-dependencies]
proc-macro2 = "1.0.36" proc-macro2 = "1.0.36"
quote = "1.0.15" quote = "1.0.15"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9ec9e0afb8fac2f5500a885e1cfd9c03f3a2ee30", default-features = false, features = ["metadata"]} stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f9f48b067be92fa9ea9dbdce0e85b5d0eb989790", default-features = false, features = ["metadata"]}
[features] [features]

6
embassy-stm32/src/adc/v2.rs
View File

@ -156,7 +156,7 @@ where
fn convert(&mut self) -> u16 { fn convert(&mut self) -> u16 {
// clear end of conversion flag // clear end of conversion flag
T::regs().sr().modify(|reg| { T::regs().sr().modify(|reg| {
reg.set_eoc(crate::pac::adc::vals::Eoc::NOTCOMPLETE); reg.set_eoc(false);
}); });
// Start conversion // Start conversion
@ -164,10 +164,10 @@ where
reg.set_swstart(true); reg.set_swstart(true);
}); });
while T::regs().sr().read().strt() == crate::pac::adc::vals::Strt::NOTSTARTED { while T::regs().sr().read().strt() == false {
// spin //wait for actual start // spin //wait for actual start
} }
while T::regs().sr().read().eoc() == crate::pac::adc::vals::Eoc::NOTCOMPLETE { while T::regs().sr().read().eoc() == false {
// spin //wait for finish // spin //wait for finish
} }