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Add octospim support for octospi (#3102)
* feat: add octospim to ospi Signed-off-by: Haobo Gu <haobogu@outlook.com> * feat: make octospim behind feature gate Signed-off-by: Haobo Gu <haobogu@outlook.com> * refactor: fix fmt issue Signed-off-by: Haobo Gu <haobogu@outlook.com> * refactor: fix ci failure Signed-off-by: Haobo Gu <haobogu@outlook.com> * feat: add octospim reg writing code Signed-off-by: Haobo Gu <haobogu@outlook.com> * feat(octospi): enable rcc for octospim at the initialization Signed-off-by: Haobo Gu <haobogu@outlook.com> * fix: add octospim feature gate Signed-off-by: Haobo Gu <haobogu@outlook.com> * fix: fix cfg flag Signed-off-by: Haobo Gu <haobogu@outlook.com> * fix: fix rcc register on stm32l4 and stm32u5 Signed-off-by: Haobo Gu <haobogu@outlook.com> * feat(ospi): support OCTOSPI2 in build.rs Signed-off-by: Haobo Gu <haobogu@outlook.com> * feat(ospi): add OCTOSPI2 pin impls Signed-off-by: HaoboGu <haobogu@outlook.com> * feat(ospi): support both ospi instances in stm32 OCTOSPIM Signed-off-by: Haobo Gu <haobogu@outlook.com> --------- Signed-off-by: Haobo Gu <haobogu@outlook.com> Signed-off-by: HaoboGu <haobogu@outlook.com>
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HaoboGu
GitHub
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@ -1054,6 +1054,30 @@ fn main() {
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(("octospi", "NCS"), quote!(crate::ospi::NSSPin)),
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(("octospi", "NCS"), quote!(crate::ospi::NSSPin)),
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(("octospi", "CLK"), quote!(crate::ospi::SckPin)),
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(("octospi", "CLK"), quote!(crate::ospi::SckPin)),
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(("octospi", "NCLK"), quote!(crate::ospi::NckPin)),
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(("octospi", "NCLK"), quote!(crate::ospi::NckPin)),
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(("octospim", "P1_IO0"), quote!(crate::ospi::D0Pin)),
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(("octospim", "P1_IO1"), quote!(crate::ospi::D1Pin)),
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(("octospim", "P1_IO2"), quote!(crate::ospi::D2Pin)),
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(("octospim", "P1_IO3"), quote!(crate::ospi::D3Pin)),
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(("octospim", "P1_IO4"), quote!(crate::ospi::D4Pin)),
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(("octospim", "P1_IO5"), quote!(crate::ospi::D5Pin)),
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(("octospim", "P1_IO6"), quote!(crate::ospi::D6Pin)),
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(("octospim", "P1_IO7"), quote!(crate::ospi::D7Pin)),
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(("octospim", "P1_DQS"), quote!(crate::ospi::DQSPin)),
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(("octospim", "P1_NCS"), quote!(crate::ospi::NSSPin)),
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(("octospim", "P1_CLK"), quote!(crate::ospi::SckPin)),
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(("octospim", "P1_NCLK"), quote!(crate::ospi::NckPin)),
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(("octospim", "P2_IO0"), quote!(crate::ospi::D0Pin)),
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(("octospim", "P2_IO1"), quote!(crate::ospi::D1Pin)),
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(("octospim", "P2_IO2"), quote!(crate::ospi::D2Pin)),
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(("octospim", "P2_IO3"), quote!(crate::ospi::D3Pin)),
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(("octospim", "P2_IO4"), quote!(crate::ospi::D4Pin)),
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(("octospim", "P2_IO5"), quote!(crate::ospi::D5Pin)),
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(("octospim", "P2_IO6"), quote!(crate::ospi::D6Pin)),
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(("octospim", "P2_IO7"), quote!(crate::ospi::D7Pin)),
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(("octospim", "P2_DQS"), quote!(crate::ospi::DQSPin)),
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(("octospim", "P2_NCS"), quote!(crate::ospi::NSSPin)),
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(("octospim", "P2_CLK"), quote!(crate::ospi::SckPin)),
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(("octospim", "P2_NCLK"), quote!(crate::ospi::NckPin)),
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(("tsc", "G1_IO1"), quote!(crate::tsc::G1IO1Pin)),
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(("tsc", "G1_IO1"), quote!(crate::tsc::G1IO1Pin)),
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(("tsc", "G1_IO2"), quote!(crate::tsc::G1IO2Pin)),
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(("tsc", "G1_IO2"), quote!(crate::tsc::G1IO2Pin)),
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(("tsc", "G1_IO3"), quote!(crate::tsc::G1IO3Pin)),
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(("tsc", "G1_IO3"), quote!(crate::tsc::G1IO3Pin)),
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@ -1111,6 +1135,15 @@ fn main() {
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peri = format_ident!("{}", pin.signal.replace('_', ""));
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peri = format_ident!("{}", pin.signal.replace('_', ""));
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}
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}
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// OCTOSPIM is special
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if p.name == "OCTOSPIM" {
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peri = format_ident!("{}", "OCTOSPI1");
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g.extend(quote! {
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pin_trait_impl!(#tr, #peri, #pin_name, #af);
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});
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peri = format_ident!("{}", "OCTOSPI2");
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}
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g.extend(quote! {
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g.extend(quote! {
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pin_trait_impl!(#tr, #peri, #pin_name, #af);
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pin_trait_impl!(#tr, #peri, #pin_name, #af);
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})
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})
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@ -16,6 +16,8 @@ use crate::dma::{word, ChannelAndRequest};
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use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed};
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use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed};
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use crate::mode::{Async, Blocking, Mode as PeriMode};
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use crate::mode::{Async, Blocking, Mode as PeriMode};
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use crate::pac::octospi::{vals, Octospi as Regs};
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use crate::pac::octospi::{vals, Octospi as Regs};
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#[cfg(octospim_v1)]
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use crate::pac::octospim::Octospim;
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use crate::rcc::{self, RccPeripheral};
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use crate::rcc::{self, RccPeripheral};
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use crate::{peripherals, Peripheral};
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use crate::{peripherals, Peripheral};
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@ -197,6 +199,83 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> {
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) -> Self {
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) -> Self {
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into_ref!(peri);
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into_ref!(peri);
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#[cfg(octospim_v1)]
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{
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// RCC for octospim should be enabled before writing register
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#[cfg(stm32l4)]
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crate::pac::RCC.ahb2smenr().modify(|w| w.set_octospimsmen(true));
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#[cfg(stm32u5)]
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crate::pac::RCC.ahb2enr1().modify(|w| w.set_octospimen(true));
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#[cfg(not(any(stm32l4, stm32u5)))]
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crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true));
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// Disable OctoSPI peripheral first
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T::REGS.cr().modify(|w| {
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w.set_en(false);
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});
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// OctoSPI IO Manager has been enabled before
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T::OCTOSPIM_REGS.cr().modify(|w| {
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w.set_muxen(false);
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w.set_req2ack_time(0xff);
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});
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// Clear config
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T::OCTOSPIM_REGS.p1cr().modify(|w| {
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w.set_clksrc(false);
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w.set_dqssrc(false);
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w.set_ncssrc(false);
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w.set_clken(false);
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w.set_dqsen(false);
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w.set_ncsen(false);
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w.set_iolsrc(0);
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w.set_iohsrc(0);
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});
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T::OCTOSPIM_REGS.p1cr().modify(|w| {
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let octospi_src = if T::OCTOSPI_IDX == 1 { false } else { true };
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w.set_ncsen(true);
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w.set_ncssrc(octospi_src);
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w.set_clken(true);
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w.set_clksrc(octospi_src);
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if dqs.is_some() {
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w.set_dqsen(true);
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w.set_dqssrc(octospi_src);
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}
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// Set OCTOSPIM IOL and IOH according to the index of OCTOSPI instance
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if T::OCTOSPI_IDX == 1 {
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w.set_iolen(true);
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w.set_iolsrc(0);
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// Enable IOH in octo and dual quad mode
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if let OspiWidth::OCTO = width {
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w.set_iohen(true);
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w.set_iohsrc(0b01);
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} else if dual_quad {
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w.set_iohen(true);
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w.set_iohsrc(0b00);
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} else {
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w.set_iohen(false);
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w.set_iohsrc(0b00);
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}
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} else {
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w.set_iolen(true);
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w.set_iolsrc(0b10);
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// Enable IOH in octo and dual quad mode
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if let OspiWidth::OCTO = width {
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w.set_iohen(true);
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w.set_iohsrc(0b11);
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} else if dual_quad {
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w.set_iohen(true);
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w.set_iohsrc(0b10);
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} else {
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w.set_iohen(false);
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w.set_iohsrc(0b00);
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}
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}
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});
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}
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// System configuration
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// System configuration
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rcc::enable_and_reset::<T>();
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rcc::enable_and_reset::<T>();
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while T::REGS.sr().read().busy() {}
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while T::REGS.sr().read().busy() {}
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@ -1056,11 +1135,25 @@ fn finish_dma(regs: Regs) {
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});
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});
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}
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}
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#[cfg(octospim_v1)]
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/// OctoSPI I/O manager instance trait.
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pub(crate) trait SealedOctospimInstance {
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const OCTOSPIM_REGS: Octospim;
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const OCTOSPI_IDX: u8;
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}
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/// OctoSPI instance trait.
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pub(crate) trait SealedInstance {
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pub(crate) trait SealedInstance {
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const REGS: Regs;
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const REGS: Regs;
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}
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}
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/// OSPI instance trait.
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/// OSPI instance trait.
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#[cfg(octospim_v1)]
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#[allow(private_bounds)]
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pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral + SealedOctospimInstance {}
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/// OSPI instance trait.
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#[cfg(not(octospim_v1))]
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#[allow(private_bounds)]
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#[allow(private_bounds)]
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pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral {}
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pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral {}
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@ -1078,6 +1171,31 @@ pin_trait!(DQSPin, Instance);
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pin_trait!(NSSPin, Instance);
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pin_trait!(NSSPin, Instance);
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dma_trait!(OctoDma, Instance);
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dma_trait!(OctoDma, Instance);
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// Hard-coded the octospi index, for OCTOSPIM
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#[cfg(octospim_v1)]
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impl SealedOctospimInstance for peripherals::OCTOSPI1 {
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const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM;
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const OCTOSPI_IDX: u8 = 1;
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}
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#[cfg(octospim_v1)]
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impl SealedOctospimInstance for peripherals::OCTOSPI2 {
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const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM;
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const OCTOSPI_IDX: u8 = 2;
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}
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#[cfg(octospim_v1)]
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foreach_peripheral!(
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(octospi, $inst:ident) => {
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impl SealedInstance for peripherals::$inst {
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const REGS: Regs = crate::pac::$inst;
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}
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impl Instance for peripherals::$inst {}
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};
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);
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#[cfg(not(octospim_v1))]
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foreach_peripheral!(
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foreach_peripheral!(
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(octospi, $inst:ident) => {
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(octospi, $inst:ident) => {
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impl SealedInstance for peripherals::$inst {
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impl SealedInstance for peripherals::$inst {
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