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Merge pull request #2988 from de-vri-es/bxcan-tx-fifo-scheduling
embassy_stm32: implement optional FIFO scheduling for outgoing frames
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commit
000b022ae2
@ -133,7 +133,7 @@ impl<T: Instance> CanConfig<'_, T> {
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self
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}
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/// Enables or disables automatic retransmission of messages.
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/// Enables or disables automatic retransmission of frames.
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///
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/// If this is enabled, the CAN peripheral will automatically try to retransmit each frame
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/// until it can be sent. Otherwise, it will try only once to send each frame.
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@ -298,6 +298,23 @@ impl<'d, T: Instance> Can<'d, T> {
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T::regs().ier().modify(|i| i.set_slkie(false));
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}
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/// Enable FIFO scheduling of outgoing frames.
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///
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/// If this is enabled, frames will be transmitted in the order that they are passed to
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/// [`write()`][Self::write] or [`try_write()`][Self::try_write()].
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///
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/// If this is disabled, frames are transmitted in order of priority.
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///
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/// FIFO scheduling is disabled by default.
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pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) {
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Registers(T::regs()).set_tx_fifo_scheduling(enabled)
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}
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/// Checks if FIFO scheduling of outgoing frames is enabled.
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pub fn tx_fifo_scheduling_enabled(&self) -> bool {
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Registers(T::regs()).tx_fifo_scheduling_enabled()
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}
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/// Queues the message to be sent.
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///
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/// If the TX queue is full, this will wait until there is space, therefore exerting backpressure.
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@ -307,7 +324,13 @@ impl<'d, T: Instance> Can<'d, T> {
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/// Attempts to transmit a frame without blocking.
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///
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/// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full.
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/// Returns [Err(TryWriteError::Full)] if the frame can not be queued for transmission now.
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///
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/// If FIFO scheduling is enabled, any empty mailbox will be used.
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///
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/// Otherwise, the frame will only be accepted if there is no frame with the same priority already queued.
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/// This is done to work around a hardware limitation that could lead to out-of-order delivery
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/// of frames with the same priority.
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pub fn try_write(&mut self, frame: &Frame) -> Result<TransmitStatus, TryWriteError> {
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self.split().0.try_write(frame)
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}
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@ -318,6 +341,11 @@ impl<'d, T: Instance> Can<'d, T> {
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}
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/// Waits until any of the transmit mailboxes become empty
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///
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/// Note that [`Self::try_write()`] may fail with [`TryWriteError::Full`],
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/// even after the future returned by this function completes.
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/// This will happen if FIFO scheduling of outgoing frames is not enabled,
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/// and a frame with equal priority is already queued for transmission.
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pub async fn flush_any(&self) {
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CanTx::<T>::flush_any_inner().await
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}
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@ -465,7 +493,13 @@ impl<'d, T: Instance> CanTx<'d, T> {
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/// Attempts to transmit a frame without blocking.
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///
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/// Returns [Err(TryWriteError::Full)] if all transmit mailboxes are full.
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/// Returns [Err(TryWriteError::Full)] if the frame can not be queued for transmission now.
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///
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/// If FIFO scheduling is enabled, any empty mailbox will be used.
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///
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/// Otherwise, the frame will only be accepted if there is no frame with the same priority already queued.
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/// This is done to work around a hardware limitation that could lead to out-of-order delivery
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/// of frames with the same priority.
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pub fn try_write(&mut self, frame: &Frame) -> Result<TransmitStatus, TryWriteError> {
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Registers(T::regs()).transmit(frame).map_err(|_| TryWriteError::Full)
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}
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@ -505,6 +539,11 @@ impl<'d, T: Instance> CanTx<'d, T> {
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}
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/// Waits until any of the transmit mailboxes become empty
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///
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/// Note that [`Self::try_write()`] may fail with [`TryWriteError::Full`],
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/// even after the future returned by this function completes.
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/// This will happen if FIFO scheduling of outgoing frames is not enabled,
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/// and a frame with equal priority is already queued for transmission.
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pub async fn flush_any(&self) {
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Self::flush_any_inner().await
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}
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@ -181,46 +181,85 @@ impl Registers {
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None
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}
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/// Enables or disables FIFO scheduling of outgoing mailboxes.
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///
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/// If this is enabled, mailboxes are scheduled based on the time when the transmit request bit of the mailbox was set.
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///
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/// If this is disabled, mailboxes are scheduled based on the priority of the frame in the mailbox.
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pub fn set_tx_fifo_scheduling(&mut self, enabled: bool) {
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self.0.mcr().modify(|w| w.set_txfp(enabled))
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}
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/// Checks if FIFO scheduling of outgoing mailboxes is enabled.
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pub fn tx_fifo_scheduling_enabled(&self) -> bool {
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self.0.mcr().read().txfp()
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}
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/// Puts a CAN frame in a transmit mailbox for transmission on the bus.
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///
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/// Frames are transmitted to the bus based on their priority (see [`FramePriority`]).
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/// Transmit order is preserved for frames with identical priority.
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/// The behavior of this function depends on wheter or not FIFO scheduling is enabled.
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/// See [`Self::set_tx_fifo_scheduling()`] and [`Self::tx_fifo_scheduling_enabled()`].
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///
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/// # Priority based scheduling
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///
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/// If FIFO scheduling is disabled, frames are transmitted to the bus based on their
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/// priority (see [`FramePriority`]). Transmit order is preserved for frames with identical
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/// priority.
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///
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/// If all transmit mailboxes are full, and `frame` has a higher priority than the
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/// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is
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/// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as
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/// [`TransmitStatus::dequeued_frame`].
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///
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/// # FIFO scheduling
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///
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/// If FIFO scheduling is enabled, frames are transmitted in the order that they are passed to this function.
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///
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/// If all transmit mailboxes are full, this function returns [`nb::Error::WouldBlock`].
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pub fn transmit(&mut self, frame: &Frame) -> nb::Result<TransmitStatus, Infallible> {
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// Check if FIFO scheduling is enabled.
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let fifo_scheduling = self.0.mcr().read().txfp();
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// Get the index of the next free mailbox or the one with the lowest priority.
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let tsr = self.0.tsr().read();
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let idx = tsr.code() as usize;
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let frame_is_pending = !tsr.tme(0) || !tsr.tme(1) || !tsr.tme(2);
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let pending_frame = if frame_is_pending {
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// High priority frames are transmitted first by the mailbox system.
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// Frames with identical identifier shall be transmitted in FIFO order.
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// The controller schedules pending frames of same priority based on the
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// mailbox index instead. As a workaround check all pending mailboxes
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// and only accept higher priority frames.
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let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2);
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let pending_frame;
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if fifo_scheduling && all_frames_are_pending {
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// FIFO scheduling is enabled and all mailboxes are full.
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// We will not drop a lower priority frame, we just report WouldBlock.
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return Err(nb::Error::WouldBlock);
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} else if !fifo_scheduling && frame_is_pending {
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// Priority scheduling is enabled and alteast one mailbox is full.
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//
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// In this mode, the peripheral transmits high priority frames first.
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// Frames with identical priority should be transmitted in FIFO order,
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// but the controller schedules pending frames of same priority based on the
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// mailbox index. As a workaround check all pending mailboxes and only accept
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// frames with a different priority.
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self.check_priority(0, frame.id().into())?;
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self.check_priority(1, frame.id().into())?;
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self.check_priority(2, frame.id().into())?;
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let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2);
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if all_frames_are_pending {
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// No free mailbox is available. This can only happen when three frames with
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// ascending priority (descending IDs) were requested for transmission and all
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// of them are blocked by bus traffic with even higher priority.
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// To prevent a priority inversion abort and replace the lowest priority frame.
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self.read_pending_mailbox(idx)
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pending_frame = self.read_pending_mailbox(idx);
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} else {
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// There was a free mailbox.
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None
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pending_frame = None;
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}
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} else {
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// All mailboxes are available: Send frame without performing any checks.
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None
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};
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// Either we have FIFO scheduling and at-least one free mailbox,
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// or we have priority scheduling and all mailboxes are free.
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// No further checks are needed.
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pending_frame = None
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}
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self.write_mailbox(idx, frame);
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@ -237,18 +276,16 @@ impl Registers {
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}
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/// Returns `Ok` when the mailbox is free or if it contains pending frame with a
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/// lower priority (higher ID) than the identifier `id`.
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/// different priority from the identifier `id`.
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fn check_priority(&self, idx: usize, id: IdReg) -> nb::Result<(), Infallible> {
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// Read the pending frame's id to check its priority.
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assert!(idx < 3);
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let tir = &self.0.tx(idx).tir().read();
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//let tir = &can.tx[idx].tir.read();
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// Check the priority by comparing the identifiers. But first make sure the
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// frame has not finished the transmission (`TXRQ` == 0) in the meantime.
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if tir.txrq() && id <= IdReg::from_register(tir.0) {
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// There's a mailbox whose priority is higher or equal
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// the priority of the new frame.
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if tir.txrq() && id == IdReg::from_register(tir.0) {
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// There's a mailbox whose priority is equal to the priority of the new frame.
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return Err(nb::Error::WouldBlock);
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}
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