From 2c8ce95548d2096f2092fedc05c4fc5af6824162 Mon Sep 17 00:00:00 2001
From: Scallop Ye <yescallop@gmail.com>
Date: Sun, 18 Dec 2022 07:13:52 +0800
Subject: [PATCH] Experimental support for `stdsimd` types (#154)

---
 Cargo.toml      |  1 +
 src/lib.rs      |  1 +
 src/pod.rs      | 26 ++++++++++++++++++++++++++
 src/zeroable.rs | 26 ++++++++++++++++++++++++++
 4 files changed, 54 insertions(+)

diff --git a/Cargo.toml b/Cargo.toml
index 0e25a8d..9bed82b 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -26,6 +26,7 @@ unsound_ptr_pod_impl = []
 
 # NOT SEMVER SUPPORTED! TEMPORARY ONLY!
 nightly_portable_simd = []
+nightly_stdsimd = []
 
 [dependencies]
 bytemuck_derive = { version = "1.2.1", path = "derive", optional = true }
diff --git a/src/lib.rs b/src/lib.rs
index 0fe64ee..19f4630 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -2,6 +2,7 @@
 #![warn(missing_docs)]
 #![allow(clippy::match_like_matches_macro)]
 #![cfg_attr(feature = "nightly_portable_simd", feature(portable_simd))]
+#![cfg_attr(feature = "nightly_stdsimd", feature(stdsimd))]
 
 //! This crate gives small utilities for casting between plain data types.
 //!
diff --git a/src/pod.rs b/src/pod.rs
index 08a9e94..7b7ccf7 100644
--- a/src/pod.rs
+++ b/src/pod.rs
@@ -321,3 +321,29 @@ where
   core::simd::LaneCount<N>: core::simd::SupportedLaneCount,
 {
 }
+
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m128bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m256bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m512 {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m512bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m512d {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86::__m512i {}
+
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m128bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m256bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m512 {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m512bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m512d {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Pod for x86_64::__m512i {}
diff --git a/src/zeroable.rs b/src/zeroable.rs
index efce2b5..a4e71d9 100644
--- a/src/zeroable.rs
+++ b/src/zeroable.rs
@@ -354,3 +354,29 @@ where
   core::simd::LaneCount<N>: core::simd::SupportedLaneCount,
 {
 }
+
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m128bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m256bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m512 {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m512bh {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m512d {}
+#[cfg(all(target_arch = "x86", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86::__m512i {}
+
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m128bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m256bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m512 {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m512bh {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m512d {}
+#[cfg(all(target_arch = "x86_64", feature = "nightly_stdsimd"))]
+unsafe impl Zeroable for x86_64::__m512i {}